Mathew King has uploaded this change for review.

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mb/g/hatch: Add privacy screen support to dratini variant

Change-Id: I6787a7eb59017ac923798cad1c1aa8cf7b75aa52
---
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/hatch/dsdt.asl
M src/mainboard/google/hatch/variants/dratini/gpio.c
M src/mainboard/google/hatch/variants/dratini/include/variant/acpi/dptf.asl
M src/mainboard/google/hatch/variants/dratini/include/variant/gpio.h
M src/mainboard/google/hatch/variants/dratini/overridetree.cb
6 files changed, 50 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/36073/1
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig
index 004cc28..800fd02 100644
--- a/src/mainboard/google/hatch/Kconfig
+++ b/src/mainboard/google/hatch/Kconfig
@@ -3,6 +3,7 @@
def_bool n
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_GENERIC_MAX98357A
+ select DRIVERS_GENERIC_GFX if BOARD_GOOGLE_DRATINI
select DRIVERS_I2C_DA7219
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl
index e2959a7..3e81f5f 100644
--- a/src/mainboard/google/hatch/dsdt.asl
+++ b/src/mainboard/google/hatch/dsdt.asl
@@ -40,6 +40,7 @@
{
#include <soc/intel/cannonlake/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
+ #include <soc/intel/cannonlake/acpi/gfx.asl>
}

/* Mainboard hooks */
diff --git a/src/mainboard/google/hatch/variants/dratini/gpio.c b/src/mainboard/google/hatch/variants/dratini/gpio.c
index 003b7d1..f03264a 100644
--- a/src/mainboard/google/hatch/variants/dratini/gpio.c
+++ b/src/mainboard/google/hatch/variants/dratini/gpio.c
@@ -33,6 +33,8 @@
PAD_NC(GPP_A19, NONE),
/* C15 : NC */
PAD_NC(GPP_C15, NONE),
+ /* E0 : LCD_PRIVACY_PCH */
+ PAD_CFG_GPO(GPP_E0, 0, DEEP),
/* F1 : NC */
PAD_NC(GPP_F1, NONE),
/* F3 : MEM_STRAP_3 */
diff --git a/src/mainboard/google/hatch/variants/dratini/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/dratini/include/variant/acpi/dptf.asl
index 31f72b3..173222d 100644
--- a/src/mainboard/google/hatch/variants/dratini/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/hatch/variants/dratini/include/variant/acpi/dptf.asl
@@ -14,3 +14,34 @@
*/

#include <baseboard/acpi/dptf.asl>
+
+Scope (\_SB.PCI0.GFX0)
+{
+ /* Read Privacy Screen Present */
+ Method (GPVD, 0, Serialized)
+ {
+ Printf ("Read Privacy Screen Present")
+ Return (One)
+ }
+
+ /* Read Privacy Screen Status */
+ Method (GPVX, 0, Serialized)
+ {
+ Printf ("Read Privacy Screen Status")
+ Return (\_SB.PCI0.GTXS (PV_ENABLE_PIN))
+ }
+
+ /* Enable Privacy Screen */
+ Method (EPVX, 0, Serialized)
+ {
+ Printf ("Enable Privacy Screen")
+ \_SB.PCI0.STXS (PV_ENABLE_PIN)
+ }
+
+ /* Disable Privacy Screen */
+ Method (DPVX, 0, Serialized)
+ {
+ Printf ("Disable Privacy Screen")
+ \_SB.PCI0.CTXS (PV_ENABLE_PIN)
+ }
+}
\ No newline at end of file
diff --git a/src/mainboard/google/hatch/variants/dratini/include/variant/gpio.h b/src/mainboard/google/hatch/variants/dratini/include/variant/gpio.h
index 92f9d41..2542503 100644
--- a/src/mainboard/google/hatch/variants/dratini/include/variant/gpio.h
+++ b/src/mainboard/google/hatch/variants/dratini/include/variant/gpio.h
@@ -24,4 +24,6 @@
#define GPIO_MEM_CONFIG_2 GPP_F10
#define GPIO_MEM_CONFIG_3 GPP_F3

+#define PV_ENABLE_PIN GPP_E0
+
#endif
diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
index f1e8239..ec23dd4 100644
--- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
@@ -54,6 +54,19 @@
register "ScsEmmcHs400Enabled" = "1"

device domain 0 on
+ device pci 02.0 on
+ chip drivers/generic/gfx
+ register "device_count" = "1"
+ register "device[0].name" = ""LCD""
+ register "device[0].addr" = "0x0400"
+ register "device[0].privacy.enabled" = "1"
+ register "device[0].privacy.detect_function" = ""^^GPVD""
+ register "device[0].privacy.status_function" = ""^^GPVX""
+ register "device[0].privacy.enable_function" = ""^^EPVX""
+ register "device[0].privacy.disable_function" = ""^^DPVX""
+ device generic 0 on end
+ end
+ end # Integrated Graphics Device
device pci 15.0 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6787a7eb59017ac923798cad1c1aa8cf7b75aa52
Gerrit-Change-Number: 36073
Gerrit-PatchSet: 1
Gerrit-Owner: Mathew King <mathewk@chromium.org>
Gerrit-MessageType: newchange