Attention is currently required from: Michał Żygowski, Michał Kopeć.

Michał Kopeć uploaded patch set #7 to the change originally created by Michał Żygowski.

View Change

cpu/amd/agesa/family14/model_14_init.c: create correct MTRR solution

Create the correct MTRR solution based on the physical address space
provided by RESOURCE_ALLOCATOR_V4. Previously CPU initialization did not
account for lost C6 DRAM storage MTRR during postcar frame creation.
The BSP on 2GB has been stripped from UC MTRR covering C6 DRAM and
overlapping with usable DRAM WB MTRR. However this UC MTRR remained on
APs which caused inconsistent MTRRs warning in Linux. Use generic MTRR
function to create correct MTRR solution that propagates to APs. This
also fixes the inconsistent MTRRs warning.

TEST=boot Debian with Linux 4.14 on apu1 2GB

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: If706f8851ed0b1d45729e81175d82abb1d9193be
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
---
M src/cpu/amd/agesa/family14/model_14_init.c
1 file changed, 30 insertions(+), 40 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/52781/7

To view, visit change 52781. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If706f8851ed0b1d45729e81175d82abb1d9193be
Gerrit-Change-Number: 52781
Gerrit-PatchSet: 7
Gerrit-Owner: Michał Żygowski <michal.zygowski@3mdeb.com>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Michał Kopeć <michal.kopec@3mdeb.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus@gmail.com>
Gerrit-CC: Paul Menzel <paulepanter@mailbox.org>
Gerrit-Attention: Michał Żygowski <michal.zygowski@3mdeb.com>
Gerrit-Attention: Michał Kopeć <michal.kopec@3mdeb.com>
Gerrit-MessageType: newpatchset