Patch Set 4:

Patch Set 4:

Is the addressed fixed?
128G~256GB
and
256G~512GB?

Did we have to force such a huge resources to PCI MMIO but not based on the real usage?

Those values are based on Intel SOC reference code going to all IBV and OEM for each soc.

Okay, so get forced in FSP side.

View Change

To view, visit change 38125. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I77b3a0e44582b047d7fbe679d3000d616f7e6111
Gerrit-Change-Number: 38125
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: V Sowmya <v.sowmya@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Lance Zhao <lance.zhao@gmail.com>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Comment-Date: Mon, 06 Jan 2020 12:34:47 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment