2 comments:
File src/mainboard/ocp/tiogapass/board.fmd:
Patch Set #24, Line 8: MISC_RW
We will have RO_VPD in future, to store stuffs like default configurations.
yeah we want to use VPD but there is no notion of RO and RW parts of flash. The board does not use WP (write protect pin) of SPI flash chip. We need to keep VPD but we do not need WP_RO section as such. Everything is RW
File src/mainboard/ocp/tiogapass/romstage.c:
mupd->FspmConfig.GpioConfig.GpioTable = (UPD_GPIO_INIT_CONFIG *) tp_gpio_table;
mupd->FspmConfig.GpioConfig.NumberOfEntries =
sizeof(tp_gpio_table)/sizeof(UPD_GPIO_INIT_CONFIG);
Those are GPIO configurations. […]
if we want FSP to leave GPIO alone, we just need to set GpioTable to NULL and NumberOfEntries to 0. But that besides the point. The point is that we need to add gpio driver for C62x PCH. But yeah we do not need to worry about that in this particular patch, I am just thinking aloud.
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