Kyösti Mälkki merged this change.

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Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Felix Held: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve Richard Spiegel: Looks good to me, approved
smsc/superio/sio1007: Fix header name

The file chip.h has a special purpose for defining the
configuration structure used in static devicetree.

Change-Id: If0289c29ca72768009c1b7166311bc4c3cee4171
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
M src/mainboard/compulab/intense_pc/romstage.c
M src/mainboard/intel/emeraldlake2/romstage.c
M src/superio/smsc/sio1007/early_serial.c
R src/superio/smsc/sio1007/sio1007.h
4 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c
index 6c3d980..74f00c2 100644
--- a/src/mainboard/compulab/intense_pc/romstage.c
+++ b/src/mainboard/compulab/intense_pc/romstage.c
@@ -17,7 +17,7 @@
#include <arch/io.h>
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
#include <southbridge/intel/bd82x6x/pch.h>

#define SIO_PORT 0x164e
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index a28ae78..ee3cec1 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -19,7 +19,7 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/superio/smsc/sio1007/early_serial.c b/src/superio/smsc/sio1007/early_serial.c
index 022a1ab..2028e67 100644
--- a/src/superio/smsc/sio1007/early_serial.c
+++ b/src/superio/smsc/sio1007/early_serial.c
@@ -15,7 +15,7 @@

#include <stdint.h>
#include <arch/io.h>
-#include "chip.h"
+#include "sio1007.h"

void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)
{
diff --git a/src/superio/smsc/sio1007/chip.h b/src/superio/smsc/sio1007/sio1007.h
similarity index 86%
rename from src/superio/smsc/sio1007/chip.h
rename to src/superio/smsc/sio1007/sio1007.h
index 78ac18a..a99ec5c 100644
--- a/src/superio/smsc/sio1007/chip.h
+++ b/src/superio/smsc/sio1007/sio1007.h
@@ -13,10 +13,11 @@
* GNU General Public License for more details.
*/

-#ifndef SUPERIO_SMSC_1007_CHIP_H
-#define SUPERIO_SMSC_1007_CHIP_H
+#ifndef SUPERIO_SMSC_SIO1007_H
+#define SUPERIO_SMSC_SIO1007_H

-/* FIXME: wrong place for this! */
+#include <stdint.h>
+
void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask);
int sio1007_enable_uart_at(u16 port);


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If0289c29ca72768009c1b7166311bc4c3cee4171
Gerrit-Change-Number: 35095
Gerrit-PatchSet: 2
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel@silverbackltd.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged