Arthur Heymans has uploaded this change for review.

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sb/intel/common: Implement acpi_is_wakeup_s3()

acpi_is_wakeup_s3() requires acpi_get_sleep_type().

Change-Id: Ibe01863e685bcbc9652a72be0632cfbd83e18380
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/southbridge/intel/common/Makefile.inc
M src/southbridge/intel/common/pmbase.c
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/52929/1

diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index adacc25..c468d5c 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -15,6 +15,7 @@
 ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
 ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus_ops.c
 
+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB) += pmclib.c
 romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB) += pmclib.c
 
 ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index 2655882..bbd2c25 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -75,6 +75,11 @@
 	return inb(lpc_get_pmbase() + addr);
 }
 
+int acpi_get_sleep_type(void)
+{
+	return acpi_sleep_from_pm1(read_pmbase32(PM1_CNT));
+}
+
 int platform_is_resuming(void)
 {
 	u16 reg16 = read_pmbase16(PM1_STS);

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