Subrata Banik uploaded patch set #6 to this change.

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soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper

This patch ensures coreboot is not publishing above 4GB mmio resource
if soc common config "enable_above_4GB_mmio" not enable.

Publishing unnecessary 4GB above MMIO resource with wrong base and size
is causing problem while working with discrete GPU.

Unable to boot with dGPU on IA platform with below error:

[ 2.297425] pcieport 0000:00:1c.0: PCI bridge to [bus 05]
[ 2.302858] pcieport 0000:00:1c.0: bridge window [io 0x2000-0x2fff]
[ 2.309427] pcieport 0000:00:1c.0: bridge window [mem 0xb2000000-0xb20fffff]
[ 2.316679] pcieport 0000:00:1c.0: bridge window [mem 0x840000000-0x8c01fffff 64bit pref]
[ 2.325072] pcieport 0000:00:1c.0: PCI bridge to [bus 05]
[ 2.330502] pcieport 0000:00:1c.0: bridge window [io 0x2000-0x2fff]
[ 2.337062] pcieport 0000:00:1c.0: bridge window [mem 0xb2000000-0xb20fffff]
[ 2.344317] pcieport 0000:00:1c.0: bridge window [mem 0xa0000000-0xb01fffff 64bit pref]
[ 2.352541] [drm] Not enough PCI address space for a large BAR.

Change-Id: I77b3a0e44582b047d7fbe679d3000d616f7e6111
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/acpi/globalnvs.asl
M src/soc/intel/apollolake/acpi/northbridge.asl
M src/soc/intel/apollolake/include/soc/iomap.h
M src/soc/intel/apollolake/include/soc/nvs.h
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/cannonlake/include/soc/iomap.h
M src/soc/intel/common/block/acpi/acpi/globalnvs.asl
M src/soc/intel/common/block/acpi/acpi/northbridge.asl
M src/soc/intel/common/block/include/intelblocks/cfg.h
M src/soc/intel/common/block/include/intelblocks/nvs.h
M src/soc/intel/common/block/include/intelblocks/systemagent.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/icelake/acpi.c
M src/soc/intel/icelake/include/soc/iomap.h
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/acpi/globalnvs.asl
M src/soc/intel/skylake/acpi/systemagent.asl
M src/soc/intel/skylake/include/soc/iomap.h
M src/soc/intel/skylake/include/soc/nvs.h
M src/soc/intel/tigerlake/acpi.c
M src/soc/intel/tigerlake/include/soc/iomap.h
22 files changed, 120 insertions(+), 46 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/38125/6

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I77b3a0e44582b047d7fbe679d3000d616f7e6111
Gerrit-Change-Number: 38125
Gerrit-PatchSet: 6
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Lance Zhao <lance.zhao@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: V Sowmya <v.sowmya@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset