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5 comments:
File src/southbridge/intel/lynxpoint/lpc.c:
This was run on LPT-LP before, right? Can we be sure it's not needed? […]
DMI doesn't exist as such on LPT-LP. Reference code only programs these registers for LPT-H, and the WPT-LP docs I have don't mention the 21a4/a8 registers. About 0x2304, the WPT-LP BIOS spec says nothing (only that it was removed from the programming steps), and the EDS says the following:
BIOS must program this field to F88400h.
*Clear* again?
No, the comment is right. The code was wrong.
Patch Set #9, Line 360: RCBA32_OR(0x3318, 0x0dcf0020);
GPIO8 is used for overclocking, c.f. […]
Bit 5 needs to be preserved. I can't find any mentions about GPIO8 on the Haswell BWG, maybe I misremembered.
Patch Set #9, Line 388: RCBA32(0x2b2c) = 0x00008813;
BIOS Spec uses this value for LPT-LP, but 0 along with the other values in […]
Reference code also uses this value on LPT-LP, but writes it earlier and to a different register. This sequence, as the comment says, is part of the DMI power optimizer, but code does nothing special w.r.t. "MB only".
That's bit 18 set, right? Spec also suggests this value but then the same […]
I've revised this as per reference code, but I agree it makes no sense.
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