Felix Held submitted this change.

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vc/amd/opensil/stub/ramstage: add acpi_add_opensil_tables stub

In the non-stub openSIL coreboot glue code, this can be used to add the
ALIB SSDT.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3ccd2e81211417ad4ac94f208572e0fa4e1cf97c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82012
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/common/block/include/amdblocks/acpi.h
M src/vendorcode/amd/opensil/stub/ramstage.c
2 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h
index e2d1c32..f791c25 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpi.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpi.h
@@ -56,6 +56,7 @@
 				    acpi_rsdp_t *rsdp);
 
 unsigned long acpi_add_fsp_tables(unsigned long current, acpi_rsdp_t *rsdp);
+unsigned long acpi_add_opensil_tables(unsigned long current, acpi_rsdp_t *rsdp);
 
 unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current,
 					    struct acpi_rsdp *rsdp);
diff --git a/src/vendorcode/amd/opensil/stub/ramstage.c b/src/vendorcode/amd/opensil/stub/ramstage.c
index 33ca447..76cbaf8 100644
--- a/src/vendorcode/amd/opensil/stub/ramstage.c
+++ b/src/vendorcode/amd/opensil/stub/ramstage.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
 #include <device/device.h>
 #include "opensil.h"
 
@@ -14,6 +15,12 @@
 	printk(BIOS_NOTICE, "openSIL stub: %s\n", __func__);
 }
 
+unsigned long acpi_add_opensil_tables(unsigned long current, acpi_rsdp_t *rsdp)
+{
+	printk(BIOS_NOTICE, "openSIL stub: %s\n", __func__);
+	return current;
+}
+
 void setup_opensil(void)
 {
 	printk(BIOS_NOTICE, "openSIL stub: %s\n", __func__);

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