Joel Kitching uploaded patch set #3 to this change.

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drivers/tpm: update TPM initialization logic for Intel FSP2.0

Intel FSP memory initialization needs to access the TPM when
HAS_RECOVERY_MRC_CACHE is enabled.

* Update its tpm_setup call to include HAS_RECOVERY_MRC_CACHE
selection as a condition.
* Update vboot's TPM initialization to bypass tpm_setup
when HAS_RECOVERY_MRC_CACHE is selected.

See bug for more information:
https://bugs.chromium.org/p/chromium/issues/detail?id=940377

BUG=chromium:940377
TEST=util/lint/checkpatch.pl -g origin/master..HEAD
TEST=util/abuild/abuild -B -e -y -c 50 -p none -x
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: I4ba91c275c33245be61041cb592e52f861dbafe6
Signed-off-by: Joel Kitching <kitching@google.com>
---
M src/drivers/intel/fsp2_0/memory_init.c
M src/security/vboot/secdata_tpm.c
2 files changed, 12 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/31837/3

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4ba91c275c33245be61041cb592e52f861dbafe6
Gerrit-Change-Number: 31837
Gerrit-PatchSet: 3
Gerrit-Owner: Joel Kitching <kitching@google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Joel Kitching <kitching@google.com>
Gerrit-Reviewer: Julius Werner <jwerner@chromium.org>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset