Felix Held has uploaded this change for review.

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soc/amd/common/psp_smm: add/improve comments to buffers and flags

Since it's not exactly obvious what 'c2p_buffer', 'p2c_buffer' and
'smm_flag' are used for, add comments to those.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4ec092a92fe9f0686ffb7103e441802fc05381f4
---
M src/soc/amd/common/block/psp/psp_smm.c
1 file changed, 14 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/83698/1

diff --git a/src/soc/amd/common/block/psp/psp_smm.c b/src/soc/amd/common/block/psp/psp_smm.c
index 2112e86..114cf12 100644
--- a/src/soc/amd/common/block/psp/psp_smm.c
+++ b/src/soc/amd/common/block/psp/psp_smm.c
@@ -14,15 +14,28 @@
 #define C2P_BUFFER_MAXSIZE 0xc00 /* Core-to-PSP buffer */
 #define P2C_BUFFER_MAXSIZE 0xc00 /* PSP-to-core buffer */
 
+/*
+ * When sending PSP mailbox commands to the PSP from the SMI handler after the boot done
+ * command was sent, the corresponding data buffer needs to be placed in this core to PSP (C2P)
+ * buffer.
+ */
 struct {
 	u8 buffer[C2P_BUFFER_MAXSIZE];
 } __aligned(32) c2p_buffer;
 
+/*
+ * When the PSP sends mailbox commands to the host, it will update the PSP to core (P2C) buffer
+ * and then send an SMI to the host to process the request.
+ */
 struct {
 	u8 buffer[P2C_BUFFER_MAXSIZE];
 } __aligned(32) p2c_buffer;
 
-static uint32_t smm_flag; /* Non-zero for SMM, clear when not */
+/*
+ * When sending PSP mailbox commands to the PSP from the SMI handler, the SMM flag needs to be
+ * set for the PSP to accept it. Otherwise it should be cleared.
+ */
+static uint32_t smm_flag;
 
 static void set_smm_flag(void)
 {

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