[coreboot-gerrit] [L] Change in coreboot[main]: devicetree.cb: Use a macro to make IO genx_dec more comprehensible

[Nicholas Chin (Code Review)]

Attention is currently required from: Alexander Couzens, Angel Pons, Arthur Heymans, Christian Walter, Dinesh Gehlot, Eran Mitrani, Eric Lai, Erik van den Bogaert, Evgeny Sorokin, Frans Hendriks, Jakub Czapiga, Jeremy Soller, Johnny Lin, Jonathon Hall, Kapil Porwal, Kevin Keijzer, Lean Sheng Tan, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Morgan Jang, Nick Vaccaro, Nico Huber, Piotr Król, Sean Rhodes, Stefan Ott, Subrata Banik, Tarun, Tim Chu, Tim Crawford, Werner Zeh.

Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79742?usp=email )

Change subject: devicetree.cb: Use a macro to make IO genx_dec more comprehensible
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Patch Set 3:

(2 comments)

Commit Message:

PS3: 
Are there any cases where the lower nibble is 0xd or 0x5? These two commands only seem to account for cases 0x1 and 0x9. The lowest two bits should always be 0b01, but any of the 4 possibilities of the upper 2 bits should be valid based on the GENx_DEC register descriptions in Intel Datasheets.

File src/southbridge/intel/common/lpc.h:

https://review.coreboot.org/c/coreboot/+/79742/comment/bcaf8ee8_c6aef60a :
PS3, Line 7: (mask) & 0xfc)
This should be shifted 16 bits such that bits 7:2 of the mask line up with bits 23:18 in the register as per the GENx_DEC register descriptions.