Angel Pons has uploaded this change for review.
mb/acer: Add Acer E5-573 mainboard
Boots to Linux, things still very WIP.
Change-Id: I3ae188ee1dcbb6dfcf825eabdc31c041095aab13
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
A src/mainboard/acer/e5-573/Kconfig
A src/mainboard/acer/e5-573/Kconfig.name
A src/mainboard/acer/e5-573/Makefile.inc
A src/mainboard/acer/e5-573/acpi/ec.asl
A src/mainboard/acer/e5-573/acpi/mainboard.asl
A src/mainboard/acer/e5-573/acpi/superio.asl
A src/mainboard/acer/e5-573/acpi_tables.c
A src/mainboard/acer/e5-573/board_info.txt
A src/mainboard/acer/e5-573/devicetree.cb
A src/mainboard/acer/e5-573/dsdt.asl
A src/mainboard/acer/e5-573/early_init.c
A src/mainboard/acer/e5-573/fadt.c
A src/mainboard/acer/e5-573/gma-mainboard.ads
A src/mainboard/acer/e5-573/gpio.c
A src/mainboard/acer/e5-573/hda_verb.c
A src/mainboard/acer/e5-573/mainboard.c
A src/mainboard/acer/e5-573/pei_data.c
A src/mainboard/acer/e5-573/romstage.c
18 files changed, 609 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/37568/1
diff --git a/src/mainboard/acer/e5-573/Kconfig b/src/mainboard/acer/e5-573/Kconfig
new file mode 100644
index 0000000..fe07c3f
--- /dev/null
+++ b/src/mainboard/acer/e5-573/Kconfig
@@ -0,0 +1,38 @@
+if BOARD_ACER_E5_573
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select SYSTEM_TYPE_LAPTOP
+ select BOARD_ROMSIZE_KB_8192
+ select HAVE_ACPI_RESUME
+ select HAVE_ACPI_TABLES
+ select INTEL_INT15
+ select MAINBOARD_HAS_LIBGFXINIT
+ select SOC_INTEL_BROADWELL
+ select INTEL_PCH_UART_CONSOLE
+
+config MAINBOARD_DIR
+ string
+ default acer/e5-573
+
+config MAINBOARD_VENDOR
+ string
+ default "Acer"
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Quanta ZRT"
+
+config MAINBOARD_FAMILY
+ string
+ default "Acer E5-573"
+
+config MAX_CPUS
+ int
+ default 8
+
+config VGA_BIOS_ID
+ string
+ default "8086,1616"
+
+endif
diff --git a/src/mainboard/acer/e5-573/Kconfig.name b/src/mainboard/acer/e5-573/Kconfig.name
new file mode 100644
index 0000000..f332bce
--- /dev/null
+++ b/src/mainboard/acer/e5-573/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_ACER_E5_573
+ bool "Acer E5-573"
diff --git a/src/mainboard/acer/e5-573/Makefile.inc b/src/mainboard/acer/e5-573/Makefile.inc
new file mode 100644
index 0000000..07ab8f0
--- /dev/null
+++ b/src/mainboard/acer/e5-573/Makefile.inc
@@ -0,0 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+bootblock-y += early_init.c
+
+romstage-y += gpio.c
+
+romstage-y += pei_data.c
+ramstage-y += pei_data.c
+
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/acer/e5-573/acpi/ec.asl b/src/mainboard/acer/e5-573/acpi/ec.asl
new file mode 100644
index 0000000..8b13789
--- /dev/null
+++ b/src/mainboard/acer/e5-573/acpi/ec.asl
@@ -0,0 +1 @@
+
diff --git a/src/mainboard/acer/e5-573/acpi/mainboard.asl b/src/mainboard/acer/e5-573/acpi/mainboard.asl
new file mode 100644
index 0000000..8b13789
--- /dev/null
+++ b/src/mainboard/acer/e5-573/acpi/mainboard.asl
@@ -0,0 +1 @@
+
diff --git a/src/mainboard/acer/e5-573/acpi/superio.asl b/src/mainboard/acer/e5-573/acpi/superio.asl
new file mode 100644
index 0000000..92c272e
--- /dev/null
+++ b/src/mainboard/acer/e5-573/acpi/superio.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/acer/e5-573/acpi_tables.c b/src/mainboard/acer/e5-573/acpi_tables.c
new file mode 100644
index 0000000..918398e
--- /dev/null
+++ b/src/mainboard/acer/e5-573/acpi_tables.c
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <arch/ioapic.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+
+void acpi_create_gnvs(global_nvs_t *gnvs)
+{
+ acpi_init_gnvs(gnvs);
+}
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+ /* Local APICs */
+ current = acpi_create_madt_lapics(current);
+
+ /* IOAPIC */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
+ 2, IO_APIC_ADDR, 0);
+
+ return acpi_madt_irq_overrides(current);
+}
diff --git a/src/mainboard/acer/e5-573/board_info.txt b/src/mainboard/acer/e5-573/board_info.txt
new file mode 100644
index 0000000..00f5feb
--- /dev/null
+++ b/src/mainboard/acer/e5-573/board_info.txt
@@ -0,0 +1,9 @@
+Category: laptop
+Vendor name: Acer
+Board name: E5-573
+Board URL: some acer website
+ROM package: SOIC8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
+Release year: 2015
diff --git a/src/mainboard/acer/e5-573/devicetree.cb b/src/mainboard/acer/e5-573/devicetree.cb
new file mode 100644
index 0000000..4d95cc1
--- /dev/null
+++ b/src/mainboard/acer/e5-573/devicetree.cb
@@ -0,0 +1,67 @@
+chip soc/intel/broadwell
+
+ # Enable eDP Hotplug with 6ms pulse
+ register "gpu_dp_d_hotplug" = "0x06"
+
+ register "gpu_dp_c_hotplug" = "0x06"
+
+ # Enable DDI1 Hotplug with 6ms pulse
+ register "gpu_dp_b_hotplug" = "0x06"
+
+ # Set backlight PWM value for eDP
+ register "gpu_pch_backlight_pwm_hz" = "200"
+
+ # Enable Panel and configure power delays
+ register "gpu_panel_port_select" = "1" # eDP
+ register "gpu_panel_power_cycle_delay" = "6" # 500ms
+ register "gpu_panel_power_up_delay" = "2000" # 200ms
+ register "gpu_panel_power_down_delay" = "500" # 50ms
+ register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms
+ register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
+
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
+ register "gen1_dec" = "0x00000381"
+ register "gen2_dec" = "0x000c0081"
+
+ register "sata_port_map" = "0x3"
+
+ # Port tuning for link stability
+ register "sata_port0_gen3_dtle" = "7"
+ register "sata_port1_gen3_dtle" = "9"
+ register "sata_port2_gen3_dtle" = "9"
+ register "sata_port3_gen3_dtle" = "7"
+
+ device cpu_cluster 0 on
+ device lapic 0 on end
+ end
+ device domain 0 on
+ device pci 00.0 on end # Host bridge
+ device pci 02.0 on end # iGPU
+ device pci 03.0 on end # Mini-HD Audio
+ device pci 13.0 off end # Smart Sound Audio DSP
+ device pci 14.0 on end # USB3 XHCI
+ device pci 15.0 on end # Serial I/O DMA
+ device pci 15.1 off end # I2C0
+ device pci 15.2 off end # I2C1
+ device pci 15.3 off end # GSPI0
+ device pci 15.4 off end # GSPI1
+ device pci 15.5 on end # UART0
+ device pci 15.6 off end # UART1
+ device pci 16.0 on end # Management Engine Interface 1
+ device pci 17.0 off end # SDIO
+ device pci 19.0 off end # GbE
+ device pci 1b.0 on end # High Definition Audio
+ device pci 1c.0 on end # PCIe Port #1
+ device pci 1c.1 on end # PCIe Port #2
+ device pci 1c.2 on end # PCIe Port #3
+ device pci 1c.3 on end # PCIe Port #4
+ device pci 1c.4 on end # PCIe Port #5
+ device pci 1c.5 on end # PCIe Port #6
+ device pci 1d.0 on end # USB2 EHCI
+ device pci 1e.0 off end # PCI bridge
+ device pci 1f.0 on end # LPC bridge
+ device pci 1f.2 on end # SATA Controller
+ device pci 1f.3 on end # SMBus
+ device pci 1f.6 on end # Thermal
+ end
+end
diff --git a/src/mainboard/acer/e5-573/dsdt.asl b/src/mainboard/acer/e5-573/dsdt.asl
new file mode 100644
index 0000000..5047ec1
--- /dev/null
+++ b/src/mainboard/acer/e5-573/dsdt.asl
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x02, /* DSDT revision: ACPI v2.0 and up */
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20160115 /* OEM revision */
+)
+{
+ #include <soc/intel/broadwell/acpi/platform.asl>
+
+ /* Global NVS and variables */
+ #include <soc/intel/broadwell/acpi/globalnvs.asl>
+
+ /* CPU */
+ #include <cpu/intel/common/acpi/cpu.asl>
+
+ Device (\_SB.PCI0)
+ {
+ #include <soc/intel/broadwell/acpi/systemagent.asl>
+ #include <soc/intel/broadwell/acpi/pch.asl>
+ }
+
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+
+ #include "acpi/mainboard.asl"
+}
diff --git a/src/mainboard/acer/e5-573/early_init.c b/src/mainboard/acer/e5-573/early_init.c
new file mode 100644
index 0000000..eb127cb
--- /dev/null
+++ b/src/mainboard/acer/e5-573/early_init.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <cf9_reset.h>
+
+void bootblock_mainboard_early_init(void)
+{
+ //do_full_reset();
+}
+
+void bootblock_mainboard_init(void)
+{
+ //do_full_reset();
+}
diff --git a/src/mainboard/acer/e5-573/fadt.c b/src/mainboard/acer/e5-573/fadt.c
new file mode 100644
index 0000000..5333701
--- /dev/null
+++ b/src/mainboard/acer/e5-573/fadt.c
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <string.h>
+#include <soc/acpi.h>
+#include <version.h>
+
+void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
+{
+ acpi_header_t *header = &fadt->header;
+
+ memset(fadt, 0, sizeof(acpi_fadt_t));
+ memcpy(header->signature, "FACP", 4);
+ header->length = sizeof(acpi_fadt_t);
+ header->revision = get_acpi_table_revision(FADT);
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->asl_compiler_id, ASLC, 4);
+ header->asl_compiler_revision = asl_revision;
+
+ fadt->firmware_ctrl = (u32)facs;
+ fadt->dsdt = (u32)dsdt;
+ fadt->reserved = 0;
+ fadt->preferred_pm_profile = PM_MOBILE;
+
+ fadt->x_firmware_ctl_l = (u32)facs;
+ fadt->x_firmware_ctl_h = 0;
+ fadt->x_dsdt_l = (u32)dsdt;
+ fadt->x_dsdt_h = 0;
+
+ acpi_fill_in_fadt(fadt);
+
+ header->checksum = acpi_checksum((void *)fadt, header->length);
+}
diff --git a/src/mainboard/acer/e5-573/gma-mainboard.ads b/src/mainboard/acer/e5-573/gma-mainboard.ads
new file mode 100644
index 0000000..8a73267
--- /dev/null
+++ b/src/mainboard/acer/e5-573/gma-mainboard.ads
@@ -0,0 +1,33 @@
+--
+-- This file is part of the coreboot project.
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (DP1,
+ DP2,
+ DP3,
+ HDMI1,
+ HDMI2,
+ HDMI3,
+ Internal,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/acer/e5-573/gpio.c b/src/mainboard/acer/e5-573/gpio.c
new file mode 100644
index 0000000..39ee46d
--- /dev/null
+++ b/src/mainboard/acer/e5-573/gpio.c
@@ -0,0 +1,115 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/gpio.h>
+
+const struct gpio_config mainboard_gpio_config[] = {
+ PCH_GPIO_ACPI_SMI, /** 0 */ // SIO_EXT_SMI#
+ PCH_GPIO_ACPI_SCI, /** 1 */ // SIO_EXT_SCI#
+ PCH_GPIO_INPUT, /** 2 */ // DGPU_EVENT#
+ PCH_GPIO_INPUT, /** 3 */ // GC6_FB_EN
+ PCH_GPIO_NATIVE, /** 4 */ // I2C0_SDA
+ PCH_GPIO_NATIVE, /** 5 */ // I2C0_SCL
+ PCH_GPIO_NATIVE, /** 6 */ // I2C1_SDA
+ PCH_GPIO_NATIVE, /** 7 */ // I2C1_SCL
+ PCH_GPIO_INPUT, /** 8 */ // GPIO8
+ PCH_GPIO_INPUT, /** 9 */ // GPIO9
+ PCH_GPIO_INPUT, /** 10 */ // GPIO10
+ PCH_GPIO_NATIVE, /** 11 */ // SMBALERT#
+ PCH_GPIO_NATIVE, /** 12 */ // LAN_DISABLE#
+ PCH_GPIO_INPUT, /** 13 */ // GPIO13
+ PCH_GPIO_INPUT, /** 14 */ // GPIO14
+ PCH_GPIO_INPUT, /** 15 */ // GPIO15
+ PCH_GPIO_INPUT, /** 16 */ // SKU_ID0
+ PCH_GPIO_INPUT, /** 17 */ // DGPU_PWROK
+ PCH_GPIO_NATIVE, /** 18 */ // CLK_PCIE_REQ0#
+ PCH_GPIO_NATIVE, /** 19 */ // CLK_PCIE_REQ1#
+ PCH_GPIO_NATIVE, /** 20 */ // CLK_PCIE_REQ2# (LAN)
+ PCH_GPIO_NATIVE, /** 21 */ // CLK_PCIE_REQ3# (WLAN)
+ PCH_GPIO_NATIVE, /** 22 */ // CLK_PCIE_REQ4# (DGPU)
+ PCH_GPIO_NATIVE, /** 23 */ // CLK_PCIE_REQ5#
+ PCH_GPIO_INPUT, /** 24 */ // GPIO24
+ PCH_GPIO_INPUT, /** 25 */ // GPIO25
+ PCH_GPIO_INPUT, /** 26 */ // GPIO26
+ PCH_GPIO_INPUT, /** 27 */ // WK_GPIO27
+ PCH_GPIO_INPUT, /** 28 */ // GPIO28
+ PCH_GPIO_NATIVE, /** 29 */ // PCH_SLP_WLAN#
+ PCH_GPIO_NATIVE, /** 30 */ // PCH_SUSPWRACK
+ PCH_GPIO_NATIVE, /** 31 */ // ACPRESENT
+ PCH_GPIO_NATIVE, /** 32 */ // CLKRUN#
+ PCH_GPIO_NATIVE, /** 33 */ // DEVSLP0
+ PCH_GPIO_INPUT, /** 34 */ // VGPU_EN
+ PCH_GPIO_INPUT, /** 35 */ // ODD_PRSNT#
+ PCH_GPIO_INPUT, /** 36 */ // DEVSLP_ODD
+ PCH_GPIO_INPUT, /** 37 */ // GPIO37
+ PCH_GPIO_NATIVE, /** 38 */ // DEVSLP1
+ PCH_GPIO_INPUT, /** 39 */ // SKU_ID1
+ PCH_GPIO_NATIVE, /** 40 */ // USB_OC0# (USB3)
+ PCH_GPIO_NATIVE, /** 41 */ // USB_OC1# (USB2)
+ PCH_GPIO_NATIVE, /** 42 */ // USB_OC2#
+ PCH_GPIO_NATIVE, /** 43 */ // USB_OC3#
+ PCH_GPIO_INPUT, /** 44 */ // GPIO44
+ PCH_GPIO_INPUT, /** 45 */ // GPIO45
+ PCH_GPIO_INPUT, /** 46 */ // ACCEL_INTA
+ PCH_GPIO_INPUT, /** 47 */ // GPIO47
+ PCH_GPIO_INPUT, /** 48 */ // DGPU_HOLD_RST#
+ PCH_GPIO_INPUT, /** 49 */ // DGPU_PWR_EN
+ PCH_GPIO_INPUT, /** 50 */ // DGPU_PW_CTRL#
+ PCH_GPIO_INPUT, /** 51 */ // BOARD_ID1
+ PCH_GPIO_INPUT, /** 52 */ // DGPU_SELECT#
+ PCH_GPIO_INPUT, /** 53 */ // BOARD_ID2
+ PCH_GPIO_INPUT, /** 54 */ // BOARD_ID4
+ PCH_GPIO_INPUT, /** 55 */ // TPD_INT#_D
+ PCH_GPIO_INPUT, /** 56 */ // GPIO56
+ PCH_GPIO_INPUT, /** 57 */ // GPIO57
+ PCH_GPIO_INPUT, /** 58 */ // GPIO58
+ PCH_GPIO_INPUT, /** 59 */ // GPIO59
+ PCH_GPIO_NATIVE, /** 60 */ // SMB0ALERT#
+ PCH_GPIO_UNUSED, /** 61 */ // GPIO61
+ PCH_GPIO_NATIVE, /** 62 */ // PCH_SUSCLK
+ PCH_GPIO_NATIVE, /** 63 */ // PCH_SLP_S5#
+ PCH_GPIO_INPUT, /** 64 */ // PCH_ODD_EN
+ PCH_GPIO_INPUT, /** 65 */ // GPIO65
+ PCH_GPIO_INPUT, /** 66 */ // GPIO66
+ PCH_GPIO_INPUT, /** 67 */ // GPIO67
+ PCH_GPIO_INPUT, /** 68 */ // GPIO68
+ PCH_GPIO_INPUT, /** 69 */ // GPIO69
+ PCH_GPIO_INPUT, /** 70 */ // BOARD_ID3
+ PCH_GPIO_NATIVE, /** 71 */ // MODPHY_EN
+ PCH_GPIO_NATIVE, /** 72 */ // PCH_BATLOW#
+ PCH_GPIO_NATIVE, /** 73 */ // SMB1ALERT#
+ PCH_GPIO_NATIVE, /** 74 */ // SMB_ME1_DAT
+ PCH_GPIO_NATIVE, /** 75 */ // SMB_ME1_CLK
+ PCH_GPIO_INPUT, /** 76 */ // BOARD_ID0
+ PCH_GPIO_NATIVE, /** 77 */ // PCI_PIRQA#
+ PCH_GPIO_NATIVE, /** 78 */ // PCI_PIRQB#
+ PCH_GPIO_NATIVE, /** 79 */ // PCI_PIRQC#
+ PCH_GPIO_NATIVE, /** 80 */ // PCI_PIRQD#
+ PCH_GPIO_NATIVE, /** 81 */ // SPKR
+ PCH_GPIO_NATIVE, /** 82 */ // SIO_RCIN#
+ PCH_GPIO_INPUT, /** 83 */ // TP_INT_PCH
+ PCH_GPIO_INPUT, /** 84 */ // GPIO84
+ PCH_GPIO_INPUT, /** 85 */ // GPIO85
+ PCH_GPIO_INPUT, /** 86 */ // GPIO86
+ PCH_GPIO_INPUT, /** 87 */ // GSPI1_CS
+ PCH_GPIO_INPUT, /** 88 */ // GSPI1_CLK
+ PCH_GPIO_INPUT, /** 89 */ // GSPI1_MISO
+ PCH_GPIO_INPUT, /** 90 */ // GSPI1_MOSI
+ PCH_GPIO_NATIVE, /** 91 */ // UART0_RXD
+ PCH_GPIO_NATIVE, /** 92 */ // UART0_TXD
+ PCH_GPIO_NATIVE, /** 93 */ // UART0_RTS
+ PCH_GPIO_NATIVE, /** 94 */ // UART0_CTS
+ PCH_GPIO_END
+};
diff --git a/src/mainboard/acer/e5-573/hda_verb.c b/src/mainboard/acer/e5-573/hda_verb.c
new file mode 100644
index 0000000..448f08c
--- /dev/null
+++ b/src/mainboard/acer/e5-573/hda_verb.c
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/acer/e5-573/mainboard.c b/src/mainboard/acer/e5-573/mainboard.c
new file mode 100644
index 0000000..2ca559a
--- /dev/null
+++ b/src/mainboard/acer/e5-573/mainboard.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <drivers/intel/gma/int15.h>
+
+static void mainboard_enable(struct device *dev)
+{
+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP,
+ GMA_INT15_PANEL_FIT_CENTERING,
+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+}
+
+struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+};
diff --git a/src/mainboard/acer/e5-573/pei_data.c b/src/mainboard/acer/e5-573/pei_data.c
new file mode 100644
index 0000000..d90aa13
--- /dev/null
+++ b/src/mainboard/acer/e5-573/pei_data.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+
+void mainboard_fill_pei_data(struct pei_data *pei_data)
+{
+ pei_data->ec_present = 1;
+ pei_data->ddr_refresh_2x = 1;
+ pei_data->dq_pins_interleaved = 1;
+
+ /* One DIMM slot */
+ pei_data->dimm_channel0_disabled = 2;
+ pei_data->dimm_channel1_disabled = 2;
+
+ pei_data->spd_addresses[0] = 0xa0;
+ pei_data->spd_addresses[2] = 0xa4;
+
+ /** USB Overcurrent pins mapping:
+ *
+ * OC0#: Left USB3 ports
+ * OC1#: Right USB2 port
+ */
+
+ /* P1: Left Side Port (USB2) */
+ pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+ /* P2: Left Side Port (USB2) */
+ pei_data_usb2_port(pei_data, 1, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+ /* P3: Empty */
+ pei_data_usb2_port(pei_data, 2, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+ /* P4: Right Side Port (USB2 only) */
+ pei_data_usb2_port(pei_data, 3, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+ /* P5: Bluetooth */
+ pei_data_usb2_port(pei_data, 4, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+ /* P6: Touch Screen */
+ pei_data_usb2_port(pei_data, 5, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_SKIP);
+ /* P7: Camera */
+ pei_data_usb2_port(pei_data, 6, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_SKIP);
+ /* P8: SD Card Reader */
+ pei_data_usb2_port(pei_data, 7, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+
+ /* P1: Left Side Port (USB3) */
+ pei_data_usb3_port(pei_data, 0, 1, USB_OC_PIN_SKIP, 0);
+ /* P2: Left Side Port (USB3) */
+ pei_data_usb3_port(pei_data, 1, 1, USB_OC_PIN_SKIP, 0);
+ /* P3: Empty */
+ pei_data_usb3_port(pei_data, 2, 1, USB_OC_PIN_SKIP, 0);
+ /* P4: Empty */
+ pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0);
+}
diff --git a/src/mainboard/acer/e5-573/romstage.c b/src/mainboard/acer/e5-573/romstage.c
new file mode 100644
index 0000000..1bdc66e
--- /dev/null
+++ b/src/mainboard/acer/e5-573/romstage.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <string.h>
+#include <soc/gpio.h>
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+#include <soc/romstage.h>
+#include <cf9_reset.h>
+
+void mainboard_pre_raminit(struct romstage_params *rp)
+{
+ pch_uart_init();
+
+ printk(BIOS_EMERG, "HEEEEEEEEEEY");
+
+ /* Initialize GPIOs */
+ init_gpios(mainboard_gpio_config);
+
+ /* Fill out PEI DATA */
+ mainboard_fill_pei_data(&rp->pei_data);
+}
+
+void mainboard_post_raminit(struct romstage_params *rp)
+{
+}
+
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