Angel Pons has uploaded this change for review.
mb/asus/p5g41t-m_lx: Do not set BSEL GPIOs in devicetree
This mainboard has the FSB BSEL straps wired to SuperIO GPIOs. They are
set up in romstage, so it makes no sense to clobber the registers with
garbage in ramstage.
Tested, my Asus P5G41T-M LX still boots and it does not need a full
reset on almost every reboot.
Change-Id: I6ea498119df44243ec42e3cb5c2903de32a17373
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
1 file changed, 0 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/39384/1
diff --git a/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb b/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
index 919d409..2ea157f 100644
--- a/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
+++ b/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
@@ -23,9 +23,6 @@
chip superio/winbond/w83627dhg
device pnp 2e.0 off end # Floppy
device pnp 2e.1 on # Parallel port
- # global
- irq 0x2c = 0xf2
- # parallel port
io 0x60 = 0x378
irq 0x70 = 7
drq 0x74 = 3
@@ -50,8 +47,6 @@
device pnp 2e.109 off end # GPIO3
device pnp 2e.209 on # GPIO4
irq 0xe8 = 0x80
- irq 0xf4 = 0xa4
- irq 0xf5 = 0x46
end
device pnp 2e.309 on # GPIO5
irq 0xfa = 0xff
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