[coreboot-gerrit] Change in coreboot[master]: soc/intel/{skl,icl}: Move tco_configure() to bootblock

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50946 )

Change subject: soc/intel/{skl,icl}: Move tco_configure() to bootblock
......................................................................

soc/intel/{skl,icl}: Move tco_configure() to bootblock

Backport commit 03ed5bff5c (soc/intel/cannonlake: Move tco_configure to
bootblock), commit bb50c67227 (soc/intel/tigerlake: Move tco_configure
to bootblock) and commit 60c619f6a3 (soc/intel/jasperlake: Move
tco_configure to bootblock) to other platforms. This is for consistency.

Change-Id: I31fd0ceb67eacf30aefa457d757bf0d7f4cd7e87
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50946
Reviewed-by: Michael Niewöhner 
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/icelake/bootblock/bootblock.c
M src/soc/intel/icelake/romstage/pch.c
M src/soc/intel/skylake/bootblock/bootblock.c
M src/soc/intel/skylake/romstage/pch.c
4 files changed, 8 insertions(+), 8 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Michael Niewöhner: Looks good to me, approved

diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c
index 9f360da..df1fb56 100644
--- a/src/soc/intel/icelake/bootblock/bootblock.c
+++ b/src/soc/intel/icelake/bootblock/bootblock.c
@@ -2,6 +2,7 @@

#include <bootblock_common.h>
 #include <intelblocks/systemagent.h>
+#include <intelblocks/tco.h>
 #include <intelblocks/uart.h>
 #include <soc/bootblock.h>

@@ -25,4 +26,7 @@
 {
    report_platform_info();
    bootblock_pch_init();
+
+	/* Program TCO_BASE_ADDRESS and TCO Timer Halt */
+	tco_configure();
 }
diff --git a/src/soc/intel/icelake/romstage/pch.c b/src/soc/intel/icelake/romstage/pch.c
index 6b134c0..d3c2554 100644
--- a/src/soc/intel/icelake/romstage/pch.c
+++ b/src/soc/intel/icelake/romstage/pch.c
@@ -1,14 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <intelblocks/smbus.h>
-#include <intelblocks/tco.h>
 #include <soc/romstage.h>

void romstage_pch_init(void)
 {
-	/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
-	tco_configure();
-
    /* Program SMBUS_BASE_ADDRESS and Enable it */
    smbus_common_init();
 }
diff --git a/src/soc/intel/skylake/bootblock/bootblock.c b/src/soc/intel/skylake/bootblock/bootblock.c
index 6380db2..1e5f105 100644
--- a/src/soc/intel/skylake/bootblock/bootblock.c
+++ b/src/soc/intel/skylake/bootblock/bootblock.c
@@ -3,6 +3,7 @@
 #include <bootblock_common.h>
 #include <intelblocks/systemagent.h>
 #include <intelblocks/gspi.h>
+#include <intelblocks/tco.h>
 #include <intelblocks/uart.h>
 #include <soc/bootblock.h>

@@ -33,4 +34,7 @@
    report_platform_info();
    bootblock_pch_init();
    gspi_early_bar_init();
+
+	/* Program TCO_BASE_ADDRESS and TCO Timer Halt */
+	tco_configure();
 }
diff --git a/src/soc/intel/skylake/romstage/pch.c b/src/soc/intel/skylake/romstage/pch.c
index c85bdd6..f94d611a 100644
--- a/src/soc/intel/skylake/romstage/pch.c
+++ b/src/soc/intel/skylake/romstage/pch.c
@@ -1,14 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <intelblocks/smbus.h>
-#include <intelblocks/tco.h>
 #include <soc/romstage.h>

void romstage_pch_init(void)
 {
-	/* Program TCO_BASE_ADDRESS and TCO Timer Halt */
-	tco_configure();
-
    /* Program SMBUS_BASE_ADDRESS and enable it */
    smbus_common_init();
 }