Patrick Rudolph has uploaded this change for review.
cpu/intel/model_206ax: Lock MSR on all cores
Lock MSR MSR_PKG_CST_CONFIG_CONTROL on all cores, not only the one
handling APM_CNT_FINALIZE.
Tested on HP Z220: FWTS no longer reports this as an issue.
Change-Id: I174d6c6c74fbba47992084cc44ebddf84eeeabd1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/cpu/intel/model_206ax/finalize.c
M src/cpu/intel/model_206ax/model_206ax_init.c
2 files changed, 2 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/39199/1
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index d51fb21..a7754ae 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -25,9 +25,6 @@
void intel_model_206ax_finalize_smm(void)
{
- /* Lock C-State MSR */
- msr_set_bit(MSR_PKG_CST_CONFIG_CONTROL, 15);
-
/* Lock AES-NI only if supported */
if (cpuid_ecx(1) & (1 << 25))
msr_set_bit(MSR_FEATURE_CONFIG, 0);
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 2571f8c..7739408 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -256,6 +256,8 @@
msr.lo |= (1 << 25); // C3 Auto Demotion Enable
msr.lo &= ~(1 << 10); // Disable IO MWAIT redirection
msr.lo |= 7; // No package C-state limit
+
+ msr.lo |= (1 << 15); // Lock C-State MSR
wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr);
msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR);
To view, visit change 39199. To unsubscribe, or for help writing mail filters, visit settings.