Felix Held submitted this change.
util/intelp2m: Add Intel Pad to Macro utility
This patch adds a new utility for converting a pad configuration from
the inteltool dump to the PAD_CFG_*() macros [1] for coreboot and GPIO
config data structures for FSP/sdk2-platforms/slimbootloader [2,3].
Mirror: https://github.com/maxpoliak/pch-pads-parser.git
[1] src/soc/intel/common/block/include/intelblocks/gpio_defs.h
[2] https://slimbootloader.github.io/tools/index.html#gpio-tool
[3] 3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/GpioSampleDef.h
Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35643
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
A util/intelp2m/Makefile
A util/intelp2m/config/config.go
A util/intelp2m/config/gopackages.png
A util/intelp2m/description.md
A util/intelp2m/fields/cb/cb.go
A util/intelp2m/fields/fields.go
A util/intelp2m/fields/fsp/fsp.go
A util/intelp2m/fields/raw/raw.go
A util/intelp2m/main.go
A util/intelp2m/parser/parser.go
A util/intelp2m/parser/template.go
A util/intelp2m/platforms/apl/macro.go
A util/intelp2m/platforms/apl/template.go
A util/intelp2m/platforms/common/macro.go
A util/intelp2m/platforms/common/register.go
A util/intelp2m/platforms/lbg/macro.go
A util/intelp2m/platforms/lbg/template.go
A util/intelp2m/platforms/snr/macro.go
A util/intelp2m/platforms/snr/template.go
19 files changed, 2,728 insertions(+), 0 deletions(-)
diff --git a/util/intelp2m/Makefile b/util/intelp2m/Makefile
new file mode 100644
index 0000000..1d9ba70
--- /dev/null
+++ b/util/intelp2m/Makefile
@@ -0,0 +1,11 @@
+# simple makefile for the project
+
+OUTPUT_DIR = generate
+PROJECT_NAME = intelp2m
+
+default:
+ go version
+ go build -v -o $(PROJECT_NAME)
+
+clean:
+ rm -Rf $(PROJECT_NAME) $(OUTPUT_DIR)
diff --git a/util/intelp2m/config/config.go b/util/intelp2m/config/config.go
new file mode 100644
index 0000000..9f0b757
--- /dev/null
+++ b/util/intelp2m/config/config.go
@@ -0,0 +1,121 @@
+package config
+
+import "os"
+
+const (
+ TempInteltool int = 0
+ TempGpioh int = 1
+ TempSpec int = 2
+)
+
+var template int = 0
+
+func TemplateSet(temp int) bool {
+ if temp > TempSpec {
+ return false
+ } else {
+ template = temp
+ return true
+ }
+}
+
+func TemplateGet() int {
+ return template
+}
+
+const (
+ SunriseType uint8 = 0
+ LewisburgType uint8 = 1
+ ApolloType uint8 = 2
+)
+
+var key uint8 = SunriseType
+
+var platform = map[string]uint8{
+ "snr": SunriseType,
+ "lbg": LewisburgType,
+ "apl": ApolloType}
+func PlatformSet(name string) int {
+ if platformType, valid := platform[name]; valid {
+ key = platformType
+ return 0
+ }
+ return -1
+}
+func PlatformGet() uint8 {
+ return key
+}
+func IsPlatform(platformType uint8) bool {
+ return platformType == key
+}
+func IsPlatformApollo() bool {
+ return IsPlatform(ApolloType)
+}
+func IsPlatformSunrise() bool {
+ return IsPlatform(SunriseType)
+}
+func IsPlatformLewisburg() bool {
+ return IsPlatform(LewisburgType)
+}
+
+var InputRegDumpFile *os.File = nil
+var OutputGenFile *os.File = nil
+
+var ignoredFieldsFormat bool = false
+func IgnoredFieldsFlagSet(flag bool) {
+ ignoredFieldsFormat = flag
+}
+func AreFieldsIgnored() bool {
+ return ignoredFieldsFormat
+}
+
+var nonCheckingFlag bool = false
+func NonCheckingFlagSet(flag bool) {
+ nonCheckingFlag = flag
+}
+func IsNonCheckingFlagUsed() bool {
+ return nonCheckingFlag
+}
+
+var infolevel uint8 = 0
+func InfoLevelSet(lvl uint8) {
+ infolevel = lvl
+}
+func InfoLevelGet() uint8 {
+ return infolevel
+}
+
+var fldstyle uint8 = CbFlds
+const (
+ NoFlds uint8 = 0
+ CbFlds uint8 = 1 // coreboot style
+ FspFlds uint8 = 2 // FSP/edk2 style
+ RawFlds uint8 = 3 // raw DW0/1 values
+)
+var fldstylemap = map[string]uint8{
+ "none" : NoFlds,
+ "cb" : CbFlds,
+ "fsp" : FspFlds,
+ "raw" : RawFlds}
+func FldStyleSet(name string) int {
+ if style, valid := fldstylemap[name]; valid {
+ fldstyle = style
+ return 0
+ }
+ return -1
+}
+func FldStyleGet() uint8 {
+ return fldstyle
+}
+func IsFieldsMacroUsed() bool {
+ return FldStyleGet() != NoFlds
+}
+func IsCbStyleMacro() bool {
+ return FldStyleGet() == CbFlds
+}
+func IsFspStyleMacro() bool {
+ return FldStyleGet() == FspFlds
+}
+func IsRawFields() bool {
+ return FldStyleGet() == RawFlds
+}
diff --git a/util/intelp2m/config/gopackages.png b/util/intelp2m/config/gopackages.png
new file mode 100644
index 0000000..fb81a1c
--- /dev/null
+++ b/util/intelp2m/config/gopackages.png
Binary files differ
diff --git a/util/intelp2m/description.md b/util/intelp2m/description.md
new file mode 100644
index 0000000..3008c04
--- /dev/null
+++ b/util/intelp2m/description.md
@@ -0,0 +1,201 @@
+Intel Pad to Macro (intelp2m) converter
+=======================================
+
+This utility allows to convert the configuration DW0/1 registers value
+from [inteltool](../inteltool/description.md) dump to coreboot macros.
+
+```bash
+(shell)$ make
+(shell)$ ./intelp2m -h
+(shell)$ ./intelp2m -file /path/to/inteltool.log
+```
+
+### Platforms
+
+It is possible to use templates for parsing files of excellent inteltool.log.
+To specify such a pattern, use the option -t <template number>. For example,
+using template type # 1, you can parse gpio.h from an already added board in
+the coreboot project.
+
+```bash
+(shell)$ ./intelp2m -h
+ -t
+ template type number
+ 0 - inteltool.log (default)
+ 1 - gpio.h
+ 2 - your template
+(shell)$ ./intelp2m -t 1 -file coreboot/src/mainboard/youboard/gpio.h
+```
+You can also add add a template to 'parser/template.go' for your file type with
+the configuration of the pads.
+
+platform type is set using the -p option (Sunrise by default):
+
+```bash
+ -p string
+ set up a platform
+ snr - Sunrise PCH with Skylake/Kaby Lake CPU
+ lbg - Lewisburg PCH with Xeon SP CPU
+ apl - Apollo Lake SoC
+ (default "snr")
+
+(shell)$ ./intelp2m -p <platform> -file path/to/inteltool.log
+```
+
+### Packages
+
+![][pckgs]
+
+[pckgs]: config/gopackages.png
+
+### Bit fields in macros
+
+Use the -fld=cb option to only generate a sequence of bit fields in a new macro:
+
+```bash
+(shell)$ ./intelp2m -fld cb -p apl -file ../apollo-inteltool.log
+```
+
+```c
+_PAD_CFG_STRUCT(GPIO_37, PAD_FUNC(NF1) | PAD_TRIG(OFF) | PAD_TRIG(OFF), PAD_PULL(DN_20K)), /* LPSS_UART0_TXD */
+```
+
+### Raw DW0, DW1 register value
+
+To generate the gpio.c with raw PAD_CFG_DW0 and PAD_CFG_DW1 register values you need
+to use the -fld=raw option:
+
+```bash
+ (shell)$ ./intelp2m -fld raw -file /path/to/inteltool.log
+```
+
+```c
+_PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000), /* CLKOUT_LPC1 */
+```
+
+```bash
+ (shell)$ ./intelp2m -iiii -fld raw -file /path/to/inteltool.log
+```
+
+```c
+/* GPP_A10 - CLKOUT_LPC1 DW0: 0x44000500, DW1: 0x00000000 */
+/* PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), */
+/* DW0 : 0x04000100 - IGNORED */
+_PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000),
+```
+
+### FSP-style macro
+
+The utility allows to generate macros that include fsp/edk2-palforms style bitfields:
+
+```bash
+(shell)$ ./intelp2m -fld fsp -p lbg -file ../crb-inteltool.log
+```
+
+```c
+{ GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone, GpioPadConfigLock }, /* GPIO */
+```
+
+```bash
+(shell)$ ./intelp2m -iiii -fld fsp -p lbg -file ../crb-inteltool.log
+```
+
+```c
+/* GPP_A12 - GPIO DW0: 0x80880102, DW1: 0x00000000 */
+/* PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT), */
+{ GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone, GpioPadConfigLock },
+```
+
+### Macro Check
+
+After generating the macro, the utility checks all used
+fields of the configuration registers. If some field has been
+ignored, the utility generates field macros. To not check
+macros, use the -n option:
+
+```bash
+(shell)$ ./intelp2m -n -file /path/to/inteltool.log
+```
+
+In this case, some fields of the configuration registers
+DW0 will be ignored.
+
+```c
+PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */
+PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */
+```
+
+### Information level
+
+The utility can generate additional information about the bit
+fields of the DW0 and DW1 configuration registers:
+
+```c
+/* GPIO_39 - LPSS_UART0_TXD (DW0: 0x44000400, DW1: 0x00003100) */ --> (2)
+/* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */ --> (3)
+/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (4)
+_PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),
+```
+
+Using the options -i, -ii, -iii, -iiii you can set the info level
+from (1) to (4):
+
+```bash
+(shell)$./intelp2m -i -file /path/to/inteltool.log
+(shell)$./intelp2m -ii -file /path/to/inteltool.log
+(shell)$./intelp2m -iii -file /path/to/inteltool.log
+(shell)$./intelp2m -iiii -file /path/to/inteltool.log
+```
+(1) : print /* GPIO_39 - LPSS_UART0_TXD */
+
+(2) : print initial raw values of configuration registers from
+inteltool dump
+DW0: 0x44000400, DW1: 0x00003100
+
+(3) : print the target macro that will generate if you use the
+-n option
+PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
+
+(4) : print decoded fields from (3) as macros
+DW0 : PAD_TRIG(OFF) - IGNORED
+
+### Ignoring Fields
+
+Utilities can generate the _PAD_CFG_STRUCT macro and exclude fields
+from it that are not in the corresponding PAD_CFG_*() macro:
+
+```bash
+(shell)$ ./intelp2m -iiii -fld cb -ign -file /path/to/inteltool.log
+```
+
+```c
+/* GPIO_39 - LPSS_UART0_TXD DW0: 0x44000400, DW1: 0x00003100 */
+/* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
+/* DW0 : PAD_TRIG(OFF) - IGNORED */
+_PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),
+```
+
+If you generate macros without checking, you can see bit fields that
+were ignored:
+
+```bash
+(shell)$ ./intelp2m -iiii -n -file /path/to/inteltool.log
+```
+
+```c
+/* GPIO_39 - LPSS_UART0_TXD DW0: 0x44000400, DW1: 0x00003100 */
+PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
+/* DW0 : PAD_TRIG(OFF) - IGNORED */
+```
+
+```bash
+(shell)$ ./intelp2m -n -file /path/to/inteltool.log
+```
+
+```c
+/* GPIO_39 - LPSS_UART0_TXD */
+PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
+```
+### Supports Chipsets
+
+ Sunrise PCH, Lewisburg PCH, Apollo Lake SoC
diff --git a/util/intelp2m/fields/cb/cb.go b/util/intelp2m/fields/cb/cb.go
new file mode 100644
index 0000000..61f59c4
--- /dev/null
+++ b/util/intelp2m/fields/cb/cb.go
@@ -0,0 +1,171 @@
+package cb
+
+import "../../config"
+import "../../platforms/common"
+
+type FieldMacros struct {}
+
+// field - data structure for creating a new bitfield macro object
+// PAD_FUNC(NF3)
+// prefix : PAD_FUNC
+// name : NF3; this value will be overridden if the configurator is used
+// unhide : conditions for hiding macros
+// configurator : method for determining the current configuration of the bit field
+type field struct {
+ prefix string
+ name string
+ unhide bool
+ configurator func()
+}
+
+// generate - wrapper for generating bitfield macros string
+// fileds : field structure
+func generate(fileds ...*field) {
+ macro := common.GetMacro()
+ var allhidden bool = true
+ for _, field := range fileds {
+ if field.unhide {
+ allhidden = false
+ macro.Or()
+ if field.prefix != "" {
+ macro.Add(field.prefix).Add("(")
+ }
+ if field.name != "" {
+ macro.Add(field.name)
+ } else if field.configurator != nil {
+ field.configurator()
+ }
+ if field.prefix != "" {
+ macro.Add(")")
+ }
+ }
+ }
+ if allhidden { macro.Add("0") }
+}
+
+// DecodeDW0 - decode value of DW0 register
+func (FieldMacros) DecodeDW0() {
+ macro := common.GetMacro()
+ dw0 := macro.Register(common.PAD_CFG_DW0)
+ generate(
+ &field {
+ prefix : "PAD_FUNC",
+ unhide : config.InfoLevelGet() <= 3 || dw0.GetPadMode() != 0,
+ configurator : func() { macro.Padfn() },
+ },
+
+ &field {
+ prefix : "PAD_RESET",
+ unhide : dw0.GetResetConfig() != 0,
+ configurator : func() { macro.Rstsrc() },
+ },
+
+ &field {
+ prefix : "PAD_TRIG",
+ unhide : dw0.GetRXLevelEdgeConfiguration() != 0,
+ configurator : func() { macro.Trig() },
+ },
+
+ &field {
+ prefix : "PAD_IRQ_ROUTE",
+ name : "IOAPIC",
+ unhide : dw0.GetGPIOInputRouteIOxAPIC() != 0,
+ },
+
+ &field {
+ prefix : "PAD_IRQ_ROUTE",
+ name : "SCI",
+ unhide : dw0.GetGPIOInputRouteSCI() != 0,
+ },
+
+ &field {
+ prefix : "PAD_IRQ_ROUTE",
+ name : "SMI",
+ unhide : dw0.GetGPIOInputRouteSMI() != 0,
+ },
+
+ &field {
+ prefix : "PAD_IRQ_ROUTE",
+ name : "NMI",
+ unhide : dw0.GetGPIOInputRouteNMI() != 0,
+ },
+
+ &field {
+ prefix : "PAD_RX_POL",
+ unhide : dw0.GetRxInvert() != 0,
+ configurator : func() { macro.Invert() },
+ },
+
+ &field {
+ prefix : "PAD_BUF",
+ unhide : dw0.GetGPIORxTxDisableStatus() != 0,
+ configurator : func() { macro.Bufdis() },
+ },
+
+ &field {
+ name : "(1 << 29)",
+ unhide : dw0.GetRXPadStateSelect() != 0,
+ },
+
+ &field {
+ name : "(1 << 28)",
+ unhide : dw0.GetRXRawOverrideStatus() != 0,
+ },
+
+ &field {
+ name : "(1 << 1)",
+ unhide : dw0.GetGPIORXState() != 0,
+ },
+
+ &field {
+ name : "1",
+ unhide : dw0.GetGPIOTXState() != 0,
+ },
+ )
+}
+
+// DecodeDW1 - decode value of DW1 register
+func (FieldMacros) DecodeDW1() {
+ macro := common.GetMacro()
+ dw1 := macro.Register(common.PAD_CFG_DW1)
+ generate(
+ &field {
+ name : "PAD_CFG1_TOL_1V8",
+ unhide : dw1.GetPadTol() != 0,
+ },
+
+ &field {
+ prefix : "PAD_PULL",
+ unhide : dw1.GetTermination() != 0,
+ configurator : func() { macro.Pull() },
+ },
+
+ &field {
+ prefix : "PAD_IOSSTATE",
+ unhide : dw1.GetIOStandbyState() != 0,
+ configurator : func() { macro.IOSstate() },
+ },
+
+ &field {
+ prefix : "PAD_IOSTERM",
+ unhide : dw1.GetIOStandbyTermination() != 0,
+ configurator : func() { macro.IOTerm() },
+ },
+
+ &field {
+ prefix : "PAD_CFG_OWN_GPIO",
+ unhide : macro.IsOwnershipDriver(),
+ configurator : func() { macro.Own() },
+ },
+ )
+}
+
+// GenerateString - generates the entire string of bitfield macros.
+func (bitfields FieldMacros) GenerateString() {
+ macro := common.GetMacro()
+ macro.Add("_PAD_CFG_STRUCT(").Id().Add(", ")
+ bitfields.DecodeDW0()
+ macro.Add(", ")
+ bitfields.DecodeDW1()
+ macro.Add("),")
+}
diff --git a/util/intelp2m/fields/fields.go b/util/intelp2m/fields/fields.go
new file mode 100644
index 0000000..d2ca0e8
--- /dev/null
+++ b/util/intelp2m/fields/fields.go
@@ -0,0 +1,20 @@
+package fields
+
+import "../config"
+import "../platforms/common"
+
+import "./fsp"
+import "./cb"
+import "./raw"
+
+// InterfaceSet - set the interface for decoding configuration
+// registers DW0 and DW1.
+func InterfaceGet() common.Fields {
+ var fldstylemap = map[uint8]common.Fields{
+ config.NoFlds : cb.FieldMacros{}, // analyze fields using cb macros
+ config.CbFlds : cb.FieldMacros{},
+ config.FspFlds : fsp.FieldMacros{},
+ config.RawFlds : raw.FieldMacros{},
+ }
+ return fldstylemap[config.FldStyleGet()]
+}
diff --git a/util/intelp2m/fields/fsp/fsp.go b/util/intelp2m/fields/fsp/fsp.go
new file mode 100644
index 0000000..fa26b5a
--- /dev/null
+++ b/util/intelp2m/fields/fsp/fsp.go
@@ -0,0 +1,171 @@
+package fsp
+
+import "../../platforms/common"
+
+type FieldMacros struct {}
+
+// field - data structure for creating a new bitfield macro object
+// configmap : map to select the current configuration
+// value : the key value in the configmap
+// override : overrides the function to generate the current bitfield macro
+type field struct {
+ configmap map[uint8]string
+ value uint8
+ override func(configuration map[uint8]string, value uint8)
+}
+
+// generate - wrapper for generating bitfield macros string
+// fileds : field structure
+func generate(fileds ...*field) {
+ macro := common.GetMacro()
+ for _, field := range fileds {
+ if field.override != nil {
+ // override if necessary
+ field.override(field.configmap, field.value)
+ continue
+ }
+
+ fieldmacro, valid := field.configmap[field.value]
+ if valid {
+ macro.Add(fieldmacro).Add(", ")
+ } else {
+ macro.Add("INVALID, ")
+ }
+ }
+}
+
+// DecodeDW0 - decode value of DW0 register
+func (FieldMacros) DecodeDW0() {
+ macro := common.GetMacro()
+ dw0 := macro.Register(common.PAD_CFG_DW0)
+
+ ownershipStatus := func() uint8 {
+ if macro.IsOwnershipDriver() { return 1 }
+ return 0
+ }
+
+ generate(
+ &field {
+ configmap : map[uint8]string{
+ 0: "GpioPadModeGpio",
+ 1: "GpioPadModeNative1",
+ 2: "GpioPadModeNative2",
+ 3: "GpioPadModeNative3",
+ 4: "GpioPadModeNative4",
+ 5: "GpioPadModeNative5",
+ },
+ value : dw0.GetPadMode(),
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 0: "GpioHostOwnAcpi",
+ 1: "GpioHostOwnGpio",
+ },
+ value : ownershipStatus(),
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 0: "GpioDirInOut",
+ 1: "GpioDirIn",
+ 2: "GpioDirOut",
+ 3: "GpioDirNone",
+ 1 << 4 | 0: "GpioDirInInvOut",
+ 1 << 4 | 1: "GpioDirInInv",
+ },
+ value : dw0.GetRxInvert() << 4 | dw0.GetRXLevelEdgeConfiguration(),
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 0: "GpioOutLow",
+ 1: "GpioOutHigh",
+ },
+ value : dw0.GetGPIOTXState(),
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 1 << 0: "GpioIntNmi",
+ 1 << 1: "GpioIntSmi",
+ 1 << 2: "GpioIntSci",
+ 1 << 3: "GpioIntApic",
+ },
+ override : func(configmap map[uint8]string, value uint8) {
+ mask := dw0.GetGPIOInputRouteIOxAPIC() << 3 |
+ dw0.GetGPIOInputRouteSCI() << 2 |
+ dw0.GetGPIOInputRouteSMI() << 1 |
+ dw0.GetGPIOInputRouteNMI()
+ if mask == 0 {
+ macro.Add("GpioIntDis | ")
+ return
+ }
+ for bit, fieldmacro := range configmap {
+ if mask & bit != 0 {
+ macro.Add(fieldmacro).Add(" | ")
+ }
+ }
+ },
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 0: "GpioIntLevel",
+ 1: "GpioIntEdge",
+ 2: "GpioIntLvlEdgDis",
+ 3: "GpioIntBothEdge",
+ },
+ value : dw0.GetResetConfig(),
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 0: "GpioResetPwrGood",
+ 1: "GpioResetDeep",
+ 2: "GpioResetNormal",
+ 3: "GpioResetResume",
+ },
+ value : dw0.GetResetConfig(),
+ },
+ )
+}
+
+// DecodeDW1 - decode value of DW1 register
+func (FieldMacros) DecodeDW1() {
+ macro := common.GetMacro()
+ dw1 := macro.Register(common.PAD_CFG_DW1)
+ generate(
+ &field {
+ override : func(configmap map[uint8]string, value uint8) {
+ if dw1.GetPadTol() != 0 {
+ macro.Add("GpioTolerance1v8 | ")
+ }
+ },
+ },
+
+ &field {
+ configmap : map[uint8]string {
+ 0x0: "GpioTermNone",
+ 0x2: "GpioTermWpd5K",
+ 0x4: "GpioTermWpd20K",
+ 0x9: "GpioTermWpu1K",
+ 0xa: "GpioTermWpu5K",
+ 0xb: "GpioTermWpu2K",
+ 0xc: "GpioTermWpu20K",
+ 0xd: "GpioTermWpu1K2K",
+ 0xf: "GpioTermNative",
+ },
+ value : dw1.GetTermination(),
+ },
+ )
+}
+
+// GenerateString - generates the entire string of bitfield macros.
+func (bitfields FieldMacros) GenerateString() {
+ macro := common.GetMacro()
+ macro.Add("{ GPIO_SKL_H_").Id().Add(", { ")
+ bitfields.DecodeDW0()
+ bitfields.DecodeDW1()
+ macro.Add(" GpioPadConfigLock } },") // TODO: configure GpioPadConfigLock
+}
diff --git a/util/intelp2m/fields/raw/raw.go b/util/intelp2m/fields/raw/raw.go
new file mode 100644
index 0000000..a54e51d
--- /dev/null
+++ b/util/intelp2m/fields/raw/raw.go
@@ -0,0 +1,28 @@
+package raw
+
+import "fmt"
+import "../../platforms/common"
+
+type FieldMacros struct {}
+
+func (FieldMacros) DecodeDW0() {
+ macro := common.GetMacro()
+ // Do not decode, print as is.
+ macro.Add(fmt.Sprintf("0x%0.8x", macro.Register(common.PAD_CFG_DW0).ValueGet()))
+}
+
+func (FieldMacros) DecodeDW1() {
+ macro := common.GetMacro()
+ // Do not decode, print as is.
+ macro.Add(fmt.Sprintf("0x%0.8x", macro.Register(common.PAD_CFG_DW1).ValueGet()))
+}
+
+// GenerateString - generates the entire string of bitfield macros.
+func (bitfields FieldMacros) GenerateString() {
+ macro := common.GetMacro()
+ macro.Add("_PAD_CFG_STRUCT(").Id().Add(", ")
+ bitfields.DecodeDW0()
+ macro.Add(", ")
+ bitfields.DecodeDW1()
+ macro.Add("),")
+}
diff --git a/util/intelp2m/main.go b/util/intelp2m/main.go
new file mode 100644
index 0000000..6c6dc343
--- /dev/null
+++ b/util/intelp2m/main.go
@@ -0,0 +1,159 @@
+package main
+
+import "flag"
+import "fmt"
+import "os"
+
+import "./parser"
+import "./config"
+
+// generateOutputFile - generates include file
+// parser : parser data structure
+func generateOutputFile(parser *parser.ParserData) (err error) {
+
+ config.OutputGenFile.WriteString(`/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef CFG_GPIO_H
+#define CFG_GPIO_H
+
+#include <gpio.h>
+
+/* Pad configuration was generated automatically using intelp2m utility */
+static const struct pad_config gpio_table[] = {
+`)
+ // Add the pads map
+ parser.PadMapFprint()
+ config.OutputGenFile.WriteString(`};
+
+#endif /* CFG_GPIO_H */
+`)
+ return nil
+}
+
+// main
+func main() {
+ // Command line arguments
+ inputFileName := flag.String("file",
+ "inteltool.log",
+ "the path to the inteltool log file\n")
+
+ outputFileName := flag.String("o",
+ "generate/gpio.h",
+ "the path to the generated file with GPIO configuration\n")
+
+ ignFlag := flag.Bool("ign",
+ false,
+ "exclude fields that should be ignored from advanced macros\n")
+
+ nonCheckFlag := flag.Bool("n",
+ false,
+ "Generate macros without checking.\n" +
+ "\tIn this case, some fields of the configuration registers\n" +
+ "\tDW0 will be ignored.\n")
+
+ infoLevel1 := flag.Bool("i",
+ false,
+ "\n\tInfo Level 1: adds DW0/DW1 value to the comments:\n" +
+ "\t/* GPIO_173 - SDCARD_D0 */\n")
+
+ infoLevel2 := flag.Bool("ii",
+ false,
+ "Info Level 2: adds original macro to the comments:\n" +
+ "\t/* GPIO_173 - SDCARD_D0 (DW0: 0x44000400, DW1: 0x00021000) */\n")
+
+ infoLevel3 := flag.Bool("iii",
+ false,
+ "Info Level 3: adds information about bit fields that (need to be ignored)\n" +
+ "\twere ignored to generate a macro:\n" +
+ "\t/* GPIO_173 - SDCARD_D0 (DW0: 0x44000400, DW1: 0x00021000) */\n" +
+ "\t/* PAD_CFG_NF_IOSSTATE(GPIO_173, DN_20K, DEEP, NF1, HIZCRx1), */\n")
+
+ infoLevel4 := flag.Bool("iiii",
+ false,
+ "Info Level 4: show decoded DW0/DW1 register:\n" +
+ "\t/* DW0: PAD_TRIG(DEEP) | PAD_BUF(TX_RX_DISABLE) - IGNORED */\n")
+
+ template := flag.Int("t", 0, "template type number\n"+
+ "\t0 - inteltool.log (default)\n"+
+ "\t1 - gpio.h\n"+
+ "\t2 - your template\n\t")
+
+ platform := flag.String("p", "snr", "set platform:\n"+
+ "\tsnr - Sunrise PCH or Skylake/Kaby Lake SoC\n"+
+ "\tlbg - Lewisburg PCH with Xeon SP\n"+
+ "\tapl - Apollo Lake SoC\n")
+
+ filedstyle := flag.String("fld", "none", "set fileds macros style:\n"+
+ "\tcb - use coreboot style for bit fields macros\n"+
+ "\tfsp - use fsp style\n"+
+ "\traw - do not convert, print as is\n")
+
+ flag.Parse()
+
+ config.IgnoredFieldsFlagSet(*ignFlag)
+ config.NonCheckingFlagSet(*nonCheckFlag)
+
+ if *infoLevel1 {
+ config.InfoLevelSet(1)
+ } else if *infoLevel2 {
+ config.InfoLevelSet(2)
+ } else if *infoLevel3 {
+ config.InfoLevelSet(3)
+ } else if *infoLevel4 {
+ config.InfoLevelSet(4)
+ }
+
+ if !config.TemplateSet(*template) {
+ fmt.Printf("Error! Unknown template format of input file!\n")
+ os.Exit(1)
+ }
+
+ if valid := config.PlatformSet(*platform); valid != 0 {
+ fmt.Printf("Error: invalid platform -%s!\n", *platform)
+ os.Exit(1)
+ }
+
+ fmt.Println("Log file:", *inputFileName)
+ fmt.Println("Output generated file:", *outputFileName)
+
+ inputRegDumpFile, err := os.Open(*inputFileName)
+ if err != nil {
+ fmt.Printf("Error: inteltool log file was not found!\n")
+ os.Exit(1)
+ }
+
+ if config.FldStyleSet(*filedstyle) != 0 {
+ fmt.Printf("Error! Unknown bit fields style option -%s!\n", *filedstyle)
+ os.Exit(1)
+ }
+
+ // create dir for output files
+ err = os.MkdirAll("generate", os.ModePerm)
+ if err != nil {
+ fmt.Printf("Error! Can not create a directory for the generated files!\n")
+ os.Exit(1)
+ }
+
+ // create empty gpio.h file
+ outputGenFile, err := os.Create(*outputFileName)
+ if err != nil {
+ fmt.Printf("Error: unable to generate GPIO config file!\n")
+ os.Exit(1)
+ }
+
+ defer inputRegDumpFile.Close()
+ defer outputGenFile.Close()
+
+ config.OutputGenFile = outputGenFile
+ config.InputRegDumpFile = inputRegDumpFile
+
+ parser := parser.ParserData{}
+ parser.Parse()
+
+ // gpio.h
+ err = generateOutputFile(&parser)
+ if err != nil {
+ fmt.Printf("Error! Can not create the file with GPIO configuration!\n")
+ os.Exit(1)
+ }
+}
diff --git a/util/intelp2m/parser/parser.go b/util/intelp2m/parser/parser.go
new file mode 100644
index 0000000..f002cc9
--- /dev/null
+++ b/util/intelp2m/parser/parser.go
@@ -0,0 +1,232 @@
+package parser
+
+import (
+ "bufio"
+ "fmt"
+ "strings"
+ "strconv"
+)
+
+import "../platforms/snr"
+import "../platforms/lbg"
+import "../platforms/apl"
+import "../config"
+
+// PlatformSpecific - platform-specific interface
+type PlatformSpecific interface {
+ GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string
+ GroupNameExtract(line string) (bool, string)
+ KeywordCheck(line string) bool
+}
+
+// padInfo - information about pad
+// id : pad id string
+// offset : the offset of the register address relative to the base
+// function : the string that means the pad function
+// dw0 : DW0 register value
+// dw1 : DW1 register value
+// ownership : host software ownership
+type padInfo struct {
+ id string
+ offset uint16
+ function string
+ dw0 uint32
+ dw1 uint32
+ ownership uint8
+}
+
+// generate - wrapper for Fprintf(). Writes text to the file specified
+// in config.OutputGenFile
+func (info *padInfo) generate(lvl uint8, line string, a ...interface{}) {
+ if config.InfoLevelGet() >= lvl {
+ fmt.Fprintf(config.OutputGenFile, line, a...)
+ }
+}
+
+// titleFprint - print GPIO group title to file
+// /* ------- GPIO Group GPP_L ------- */
+func (info *padInfo) titleFprint() {
+ info.generate(0, "\n\t/* %s */\n", info.function)
+}
+
+// reservedFprint - print reserved GPIO to file as comment
+// /* GPP_H17 - RESERVED */
+func (info *padInfo) reservedFprint() {
+ info.generate(2, "\n")
+ // small comment about reserved port
+ info.generate(0, "\t/* %s - %s */\n", info.id, info.function)
+}
+
+// padInfoMacroFprint - print information about current pad to file using
+// special macros:
+// PAD_CFG_NF(GPP_F1, 20K_PU, PLTRST, NF1), /* SATAXPCIE4 */
+// gpio : gpio.c file descriptor
+// macro : string of the generated macro
+func (info *padInfo) padInfoMacroFprint(macro string) {
+ info.generate(2, "\n")
+ info.generate(1, "\t/* %s - %s ", info.id, info.function)
+ info.generate(2, "DW0: 0x%0.8x, DW1: 0x%0.8x ", info.dw0, info.dw1)
+ info.generate(1, "*/\n")
+ info.generate(0, "\t%s", macro)
+ if config.InfoLevelGet() == 0 {
+ info.generate(0, "\t/* %s */", info.function)
+ }
+ info.generate(0, "\n")
+}
+
+// ParserData - global data
+// line : string from the configuration file
+// padmap : pad info map
+// RawFmt : flag for generating pads config file with DW0/1 reg raw values
+// Template : structure template type of ConfigFile
+type ParserData struct {
+ platform PlatformSpecific
+ line string
+ padmap []padInfo
+ ownership map[string]uint32
+}
+
+// hostOwnershipGet - get the host software ownership value for the corresponding
+// pad ID
+// id : pad ID string
+// return the host software ownership form the parser struct
+func (parser *ParserData) hostOwnershipGet(id string) uint8 {
+ var ownership uint8 = 0
+ status, group := parser.platform.GroupNameExtract(id)
+ if config.TemplateGet() == config.TempInteltool && status {
+ numder, _ := strconv.Atoi(strings.TrimLeft(id, group))
+ if (parser.ownership[group] & (1 << uint8(numder))) != 0 {
+ ownership = 1
+ }
+ }
+ return ownership
+}
+
+// padInfoExtract - adds a new entry to pad info map
+// return error status
+func (parser *ParserData) padInfoExtract() int {
+ var function, id string
+ var dw0, dw1 uint32
+ var template = map[int]template{
+ config.TempInteltool: useInteltoolLogTemplate,
+ config.TempGpioh : useGpioHTemplate,
+ config.TempSpec : useYourTemplate,
+ }
+ if template[config.TemplateGet()](parser.line, &function, &id, &dw0, &dw1) == 0 {
+ pad := padInfo{id: id,
+ function: function,
+ dw0: dw0,
+ dw1: dw1,
+ ownership: parser.hostOwnershipGet(id)}
+ parser.padmap = append(parser.padmap, pad)
+ return 0
+ }
+ fmt.Printf("This template (%d) does not match!\n", config.TemplateGet())
+ return -1
+}
+
+// communityGroupExtract
+func (parser *ParserData) communityGroupExtract() {
+ pad := padInfo{function: parser.line}
+ parser.padmap = append(parser.padmap, pad)
+}
+
+// PlatformSpecificInterfaceSet - specific interface for the platform selected
+// in the configuration
+func (parser *ParserData) PlatformSpecificInterfaceSet() {
+ var platform = map[uint8]PlatformSpecific {
+ config.SunriseType : snr.PlatformSpecific{},
+ // See platforms/lbg/macro.go
+ config.LewisburgType : lbg.PlatformSpecific{
+ InheritanceTemplate : snr.PlatformSpecific{},
+ },
+ config.ApolloType : apl.PlatformSpecific{},
+ }
+ parser.platform = platform[config.PlatformGet()]
+}
+
+// PadMapFprint - print pad info map to file
+func (parser *ParserData) PadMapFprint() {
+ for _, pad := range parser.padmap {
+ switch pad.dw0 {
+ case 0:
+ pad.titleFprint()
+ case 0xffffffff:
+ pad.reservedFprint()
+ default:
+ str := parser.platform.GenMacro(pad.id, pad.dw0, pad.dw1, pad.ownership)
+ pad.padInfoMacroFprint(str)
+ }
+ }
+}
+
+// Register - read specific platform registers (32 bits)
+// line : string from file with pad config map
+// nameTemplate : register name femplate to filter parsed lines
+// return
+// valid : true if the dump of the register in intertool.log is set in accordance
+// with the template
+// name : full register name
+// offset : register offset relative to the base address
+// value : register value
+func (parser *ParserData) Register(nameTemplate string) (
+ valid bool, name string, offset uint32, value uint32) {
+ if strings.Contains(parser.line, nameTemplate) &&
+ config.TemplateGet() == config.TempInteltool {
+ if registerInfoTemplate(parser.line, &name, &offset, &value) == 0 {
+ fmt.Printf("\n\t/* %s : 0x%x : 0x%x */\n", name, offset, value)
+ return true, name, offset, value
+ }
+ }
+ return false, "ERROR", 0, 0
+}
+
+// padOwnershipExtract - extract Host Software Pad Ownership from inteltool dump
+// return true if success
+func (parser *ParserData) padOwnershipExtract() bool {
+ var group string
+ status, name, offset, value := parser.Register("HOSTSW_OWN_GPP_")
+ if status {
+ _, group = parser.platform.GroupNameExtract(parser.line)
+ parser.ownership[group] = value
+ fmt.Printf("\n\t/* padOwnershipExtract: [offset 0x%x] %s = 0x%x */\n",
+ offset, name, parser.ownership[group])
+ }
+ return status
+}
+
+// padConfigurationExtract - reads GPIO configuration registers and returns true if the
+// information from the inteltool log was successfully parsed.
+func (parser *ParserData) padConfigurationExtract() bool {
+ // Only for Sunrise PCH and only for inteltool.log file template
+ if config.TemplateGet() != config.TempInteltool || config.IsPlatformApollo() {
+ return false
+ }
+ return parser.padOwnershipExtract()
+}
+
+// Parse pads groupe information in the inteltool log file
+// ConfigFile : name of inteltool log file
+func (parser *ParserData) Parse() {
+ // Read all lines from inteltool log file
+ fmt.Println("Parse IntelTool Log File...")
+
+ // determine the platform type and set the interface for it
+ parser.PlatformSpecificInterfaceSet()
+
+ // map of thepad ownership registers for the GPIO controller
+ parser.ownership = make(map[string]uint32)
+
+ scanner := bufio.NewScanner(config.InputRegDumpFile)
+ for scanner.Scan() {
+ parser.line = scanner.Text()
+ if strings.Contains(parser.line, "GPIO Community") || strings.Contains(parser.line, "GPIO Group") {
+ parser.communityGroupExtract()
+ } else if !parser.padConfigurationExtract() && parser.platform.KeywordCheck(parser.line) {
+ if parser.padInfoExtract() != 0 {
+ fmt.Println("...error!")
+ }
+ }
+ }
+ fmt.Println("...done!")
+}
diff --git a/util/intelp2m/parser/template.go b/util/intelp2m/parser/template.go
new file mode 100644
index 0000000..bc7d702
--- /dev/null
+++ b/util/intelp2m/parser/template.go
@@ -0,0 +1,132 @@
+package parser
+
+import (
+ "fmt"
+ "strings"
+ "unicode"
+)
+
+type template func(string, *string, *string, *uint32, *uint32) int
+
+// extractPadFuncFromComment
+// line : string from file with pad config map
+// return : pad function string
+func extractPadFuncFromComment(line string) string {
+ if !strings.Contains(line, "/*") && !strings.Contains(line, "*/") {
+ return ""
+ }
+
+ fields := strings.Fields(line)
+ for i, field := range fields {
+ if field == "/*" && len(fields) >= i+2 {
+ return fields[i+1]
+ }
+ }
+ return ""
+}
+
+// tokenCheck
+func tokenCheck(c rune) bool {
+ return c != '_' && c != '#' && !unicode.IsLetter(c) && !unicode.IsNumber(c)
+}
+
+// useGpioHTemplate
+// line : string from file with pad config map
+// *function : the string that means the pad function
+// *id : pad id string
+// *dw0 : DW0 register value
+// *dw1 : DW1 register value
+// return
+// error status
+func useInteltoolLogTemplate(line string, function *string,
+ id *string, dw0 *uint32, dw1 *uint32) int {
+
+ var val uint64
+ // 0x0520: 0x0000003c44000600 GPP_B12 SLP_S0#
+ // 0x0438: 0xffffffffffffffff GPP_C7 RESERVED
+ if fields := strings.FieldsFunc(line, tokenCheck); len(fields) >= 4 {
+ fmt.Sscanf(fields[1], "0x%x", &val)
+ *dw0 = uint32(val & 0xffffffff)
+ *dw1 = uint32(val >> 32)
+ *id = fields[2]
+ *function = fields[3]
+ // Sometimes the configuration file contains compound functions such as
+ // SUSWARN#/SUSPWRDNACK. Since the template does not take this into account,
+ // need to collect all parts of the pad function back into a single word
+ for i := 4; i < len(fields); i++ {
+ *function += "/" + fields[i]
+ }
+ // clear RO Interrupt Select (INTSEL)
+ *dw1 &= 0xffffff00
+ }
+ return 0
+}
+
+// useGpioHTemplate
+// line : string from file with pad config map
+// *function : the string that means the pad function
+// *id : pad id string
+// *dw0 : DW0 register value
+// *dw1 : DW1 register value
+// return
+// error status
+func useGpioHTemplate(line string, function *string,
+ id *string, dw0 *uint32, dw1 *uint32) int {
+
+ // /* RCIN# */ _PAD_CFG_STRUCT(GPP_A0, 0x44000702, 0x00000000),
+ // _PAD_CFG_STRUCT(GPP_A0, 0x44000702, 0x00000000), /* RCIN# */
+ // _PAD_CFG_STRUCT(GPP_A0, 0x44000702, 0x00000000)
+ fields := strings.FieldsFunc(line, tokenCheck)
+ for i, field := range fields {
+ if field == "_PAD_CFG_STRUCT" {
+ if len(fields) < 4 {
+ /* the number of definitions does not match the format */
+ return -1
+ }
+
+ if !strings.Contains(fields[i+2], "0x") || !strings.Contains(fields[i+3], "0x") {
+ /* definitions inside the macro do not match the pattern */
+ return -1
+ }
+ *id = fields[i+1]
+ fmt.Sscanf(fields[i+2], "0x%x", dw0)
+ fmt.Sscanf(fields[i+3], "0x%x", dw1)
+ *function = extractPadFuncFromComment(line)
+ return 0
+ }
+ }
+ return -1
+}
+
+// useYourTemplate
+func useYourTemplate(line string, function *string,
+ id *string, dw0 *uint32, dw1 *uint32) int {
+
+ // ADD YOUR TEMPLATE HERE
+ *function = ""
+ *id = ""
+ *dw0 = 0
+ *dw1 = 0
+
+ fmt.Printf("ADD YOUR TEMPLATE!\n")
+ return -1
+}
+
+// registerInfoTemplate
+// line : (in) string from file with pad config map
+// *name : (out) register name
+// *offset : (out) offset name
+// *value : (out) register value
+// return
+// error status
+func registerInfoTemplate(line string, name *string, offset *uint32, value *uint32) int {
+ // 0x0088: 0x00ffffff (HOSTSW_OWN_GPP_F)
+ // 0x0100: 0x00000000 (GPI_IS_GPP_A)
+ if fields := strings.FieldsFunc(line, tokenCheck); len(fields) == 3 {
+ *name = fields[2]
+ fmt.Sscanf(fields[1], "0x%x", value)
+ fmt.Sscanf(fields[0], "0x%x", offset)
+ return 0
+ }
+ return -1
+}
diff --git a/util/intelp2m/platforms/apl/macro.go b/util/intelp2m/platforms/apl/macro.go
new file mode 100644
index 0000000..4288fa4
--- /dev/null
+++ b/util/intelp2m/platforms/apl/macro.go
@@ -0,0 +1,329 @@
+package apl
+
+import "fmt"
+import "strconv"
+
+// Local packages
+import "../common"
+import "../../config"
+import "../../fields"
+
+const (
+ PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
+ PAD_CFG_DW1_RO_FIELDS = 0xfffc00ff
+)
+
+const (
+ PAD_CFG_DW0 = common.PAD_CFG_DW0
+ PAD_CFG_DW1 = common.PAD_CFG_DW1
+ MAX_DW_NUM = common.MAX_DW_NUM
+)
+
+const (
+ PULL_NONE = 0x0 // 0 000: none
+ PULL_DN_5K = 0x2 // 0 010: 5k wpd (Only available on SMBus GPIOs)
+ PULL_DN_20K = 0x4 // 0 100: 20k wpd
+ // PULL_NONE = 0x8 // 1 000: none
+ PULL_UP_1K = 0x9 // 1 001: 1k wpu (Only available on I2C GPIOs)
+ PULL_UP_2K = 0xb // 1 011: 2k wpu (Only available on I2C GPIOs)
+ PULL_UP_20K = 0xc // 1 100: 20k wpu
+ PULL_UP_667 = 0xd // 1 101: 1k & 2k wpu (Only available on I2C GPIOs)
+ PULL_NATIVE = 0xf // 1 111: (optional) Native controller selected by Pad Mode
+)
+
+type PlatformSpecific struct {}
+
+// RemmapRstSrc - remmap Pad Reset Source Config
+// remmap is not required because it is the same as common.
+func (PlatformSpecific) RemmapRstSrc() {}
+
+// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument
+// return: macro
+func (PlatformSpecific) Rstsrc() {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ // See src/soc/intel/apollolake/gpio_apl.c:
+ // static const struct reset_mapping rst_map[] = {
+ // { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 },
+ // { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 },
+ // { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 },
+ // };
+
+ var resetsrc = map[uint8]string{
+ 0: "PWROK",
+ 1: "DEEP",
+ 2: "PLTRST",
+ }
+ str, valid := resetsrc[dw0.GetResetConfig()]
+ if !valid {
+ // 3h = Reserved (implement as setting 0h)
+ dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+ str = "PWROK"
+ }
+ macro.Separator().Add(str)
+}
+
+// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
+// return: macro
+func (PlatformSpecific) Pull() {
+ macro := common.GetMacro()
+ dw1 := macro.Register(PAD_CFG_DW1)
+ var pull = map[uint8]string{
+ PULL_NONE: "NONE",
+ PULL_DN_5K: "DN_5K",
+ PULL_DN_20K: "DN_20K",
+ PULL_UP_1K: "UP_1K",
+ PULL_UP_2K: "UP_2K",
+ PULL_UP_20K: "UP_20K",
+ PULL_UP_667: "UP_667",
+ PULL_NATIVE: "NATIVE",
+
+ }
+ terminationFieldValue := dw1.GetTermination()
+ str, valid := pull[terminationFieldValue]
+ if !valid {
+ str = strconv.Itoa(int(terminationFieldValue))
+ fmt.Println("Error", macro.PadIdGet(), " invalid TERM value = ", str)
+ }
+ macro.Separator().Add(str)
+}
+
+// Generate macro to cause peripheral IRQ when configured in GPIO input mode
+func ioApicRoute() bool {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ dw1 := macro.Register(PAD_CFG_DW1)
+ if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
+ return false
+ }
+ macro.Add("_APIC")
+ if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+ // e.g. H1_PCH_INT_ODL
+ // PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),
+ macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
+ } else {
+ // PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
+ macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
+ }
+ macro.Add("),")
+ return true
+}
+
+// Generate macro to cause NMI when configured in GPIO input mode
+func nmiRoute() bool {
+ macro := common.GetMacro()
+ if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 {
+ return false
+ }
+ // e.g. PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
+ macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
+ return true
+}
+
+// Generate macro to cause SCI when configured in GPIO input mode
+func sciRoute() bool {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ dw1 := macro.Register(PAD_CFG_DW0)
+ if dw0.GetGPIOInputRouteSCI() == 0 {
+ return false
+ }
+ if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+ // PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),
+ macro.Add("_SCI_IOS")
+ macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
+ } else if dw0.GetRXLevelEdgeConfiguration() & 0x1 != 0 {
+ // e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
+ macro.Add("_ACPI_SCI").Add("(").Id().Pull().Rstsrc().Invert()
+ } else {
+ // e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
+ macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
+ }
+ macro.Add("),")
+ return true
+}
+
+// Generate macro to cause SMI when configured in GPIO input mode
+func smiRoute() bool {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ dw1 := macro.Register(PAD_CFG_DW1)
+ if dw0.GetGPIOInputRouteSMI() == 0 {
+ return false
+ }
+ if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+ // PAD_CFG_GPI_SMI_IOS(GPIO_41, UP_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME),
+ macro.Add("_SMI_IOS")
+ macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
+ } else if dw0.GetRXLevelEdgeConfiguration() & 0x1 != 0 {
+ // e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
+ macro.Add("_ACPI_SMI").Add("(").Id().Pull().Rstsrc().Invert()
+ } else {
+ // e.g. PAD_CFG_GPI_SMI(GPP_E3, NONE, PLTRST, EDGE_SINGLE, NONE),
+ macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
+ }
+ macro.Add("),")
+ return true
+}
+
+// Generate macro for GPI port
+func (PlatformSpecific) GpiMacroAdd() {
+ macro := common.GetMacro()
+ var ids []string
+ macro.Set("PAD_CFG_GPI")
+ for routeid, isRoute := range map[string]func() (bool) {
+ "IOAPIC": ioApicRoute,
+ "SCI": sciRoute,
+ "SMI": smiRoute,
+ "NMI": nmiRoute,
+ } {
+ if isRoute() {
+ ids = append(ids, routeid)
+ }
+ }
+
+ switch argc := len(ids); argc {
+ case 0:
+ dw1 := macro.Register(PAD_CFG_DW1)
+ isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
+ isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
+ if isIOStandbyStateUsed && !isIOStandbyTerminationUsed {
+ macro.Add("_TRIG_IOSSTATE_OWN(")
+ // PAD_CFG_GPI_TRIG_IOSSTATE_OWN(pad, pull, rst, trig, iosstate, own)
+ macro.Id().Pull().Rstsrc().Trig().IOSstate().Own().Add("),")
+ } else if isIOStandbyTerminationUsed {
+ macro.Add("_TRIG_IOS_OWN(")
+ // PAD_CFG_GPI_TRIG_IOS_OWN(pad, pull, rst, trig, iosstate, iosterm, own)
+ macro.Id().Pull().Rstsrc().Trig().IOSstate().IOTerm().Own().Add("),")
+ } else {
+ // PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
+ macro.Add("_TRIG_OWN(").Id().Pull().Rstsrc().Trig().Own().Add("),")
+ }
+ case 1:
+ // GPI with IRQ route
+ if config.AreFieldsIgnored() {
+ macro.SetPadOwnership(common.PAD_OWN_ACPI)
+ }
+ case 2:
+ // PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
+ macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
+ macro.Add(", " + ids[0] + ", " + ids[1] + "),")
+ if config.AreFieldsIgnored() {
+ macro.SetPadOwnership(common.PAD_OWN_ACPI)
+ }
+ default:
+ // Clear the control mask so that the check fails and "Advanced" macro is
+ // generated
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ }
+}
+
+
+// Adds PAD_CFG_GPO macro with arguments
+func (PlatformSpecific) GpoMacroAdd() {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ dw1 := macro.Register(PAD_CFG_DW1)
+ term := dw1.GetTermination()
+
+ macro.Set("PAD_CFG")
+ if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
+ // PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD),
+ // PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm)
+ macro.Add("_GPO_IOSSTATE_IOSTERM(").Id().Val().Rstsrc().Pull().IOSstate().IOTerm()
+ } else {
+ if term != 0 {
+ // e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
+ // PAD_CFG_TERM_GPO(pad, val, pull, rst)
+ macro.Add("_TERM")
+ }
+ macro.Add("_GPO(").Id().Val()
+ if term != 0 {
+ macro.Pull()
+ }
+ macro.Rstsrc()
+ }
+ macro.Add("),")
+
+ if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+ // ignore if trig = OFF is not set
+ dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+ }
+}
+
+// Adds PAD_CFG_NF macro with arguments
+func (PlatformSpecific) NativeFunctionMacroAdd() {
+ macro := common.GetMacro()
+ dw1 := macro.Register(PAD_CFG_DW1)
+ isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
+ isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
+
+ macro.Set("PAD_CFG_NF")
+ if !isIOStandbyTerminationUsed && isIOStandbyStateUsed {
+ if dw1.GetIOStandbyState() == common.StandbyIgnore {
+ // PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1),
+ macro.Add("_IOSTANDBY_IGNORE(").Id().Pull().Rstsrc().Padfn()
+ } else {
+ // PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE),
+ macro.Add("_IOSSTATE(").Id().Pull().Rstsrc().Padfn().IOSstate()
+ }
+ } else if isIOStandbyTerminationUsed {
+ // PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_103, NATIVE, DEEP, NF1, MASK, SAME),
+ macro.Add("_IOSSTATE_IOSTERM(").Id().Pull().Rstsrc().Padfn().IOSstate().IOTerm()
+ } else {
+ // e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
+ macro.Add("(").Id().Pull().Rstsrc().Padfn()
+ }
+ macro.Add("),")
+
+ if dw0 := macro.Register(PAD_CFG_DW0); dw0.GetGPIORxTxDisableStatus() != 0 {
+ // Since the bufbis parameter will be ignored for NF, we should clear
+ // the corresponding bits in the control mask.
+ dw0.CntrMaskFieldsClear(common.RxTxBufDisableMask)
+ }
+}
+
+// Adds PAD_NC macro
+func (PlatformSpecific) NoConnMacroAdd() {
+ macro := common.GetMacro()
+ dw1 := macro.Register(PAD_CFG_DW1)
+
+ if dw1.GetIOStandbyState() == common.TxDRxE {
+ dw0 := macro.Register(PAD_CFG_DW0)
+
+ // See comments in sunrise/macro.go : NoConnMacroAdd()
+ if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+ dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+ }
+ if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP
+ dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+ }
+
+ // PAD_NC(OSC_CLK_OUT_1, DN_20K)
+ macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
+ return
+ }
+ // PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD),
+ macro.Set("PAD_CFG_GPIO_")
+ if macro.IsOwnershipDriver() {
+ // PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_55, UP_20K, DEEP, HIZCRx1, ENPU),
+ macro.Add("DRIVER_")
+ }
+ macro.Add("HI_Z(").Id().Pull().Rstsrc().IOSstate().IOTerm().Add("),")
+}
+
+// GenMacro - generate pad macro
+// dw0 : DW0 config register value
+// dw1 : DW1 config register value
+// return: string of macro
+// error
+func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
+ macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet())
+ // use platform-specific interface in Macro struct
+ macro.PadIdSet(id).SetPadOwnership(ownership)
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
+ macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
+ return macro.Generate()
+}
diff --git a/util/intelp2m/platforms/apl/template.go b/util/intelp2m/platforms/apl/template.go
new file mode 100644
index 0000000..5944727
--- /dev/null
+++ b/util/intelp2m/platforms/apl/template.go
@@ -0,0 +1,35 @@
+package apl
+
+import "strings"
+
+// GroupNameExtract - This function extracts the group ID, if it exists in a row
+// line : string from the configuration file
+// return
+// bool : true if the string contains a group identifier
+// string : group identifier
+func (PlatformSpecific) GroupNameExtract(line string) (bool, string) {
+ // Not supported
+ return false, ""
+}
+
+// KeywordCheck - This function is used to filter parsed lines of the configuration file and
+// returns true if the keyword is contained in the line.
+// line : string from the configuration file
+func (PlatformSpecific) KeywordCheck(line string) bool {
+ for _, keyword := range []string{
+ "GPIO_", "TCK", "TRST_B", "TMS", "TDI", "CX_PMODE", "CX_PREQ_B", "JTAGX", "CX_PRDY_B",
+ "TDO", "CNV_BRI_DT", "CNV_BRI_RSP", "CNV_RGI_DT", "CNV_RGI_RSP", "SVID0_ALERT_B",
+ "SVID0_DATA", "SVID0_CLK", "PMC_SPI_FS", "PMC_SPI_RXD", "PMC_SPI_TXD", "PMC_SPI_CLK",
+ "PMIC_PWRGOOD", "PMIC_RESET_B", "PMIC_THERMTRIP_B", "PMIC_STDBY", "PROCHOT_B",
+ "PMIC_I2C_SCL", "PMIC_I2C_SDA", "FST_SPI_CLK_FB", "OSC_CLK_OUT_", "PMU_AC_PRESENT",
+ "PMU_BATLOW_B", "PMU_PLTRST_B", "PMU_PWRBTN_B", "PMU_RESETBUTTON_B", "PMU_SLP_S0_B",
+ "PMU_SLP_S3_B", "PMU_SLP_S4_B", "PMU_SUSCLK", "PMU_WAKE_B", "SUS_STAT_B", "SUSPWRDNACK",
+ "SMB_ALERTB", "SMB_CLK", "SMB_DATA", "LPC_ILB_SERIRQ", "LPC_CLKOUT", "LPC_AD", "LPC_CLKRUNB",
+ "LPC_FRAMEB",
+ } {
+ if strings.Contains(line, keyword) {
+ return true
+ }
+ }
+ return false
+}
diff --git a/util/intelp2m/platforms/common/macro.go b/util/intelp2m/platforms/common/macro.go
new file mode 100644
index 0000000..e30ef22
--- /dev/null
+++ b/util/intelp2m/platforms/common/macro.go
@@ -0,0 +1,417 @@
+package common
+
+import "strconv"
+import "sync"
+
+import "../../config"
+
+type Fields interface {
+ DecodeDW0()
+ DecodeDW1()
+ GenerateString()
+}
+
+const (
+ PAD_OWN_ACPI = 0
+ PAD_OWN_DRIVER = 1
+)
+
+const (
+ TxLASTRxE = 0x0
+ Tx0RxDCRx0 = 0x1
+ Tx0RxDCRx1 = 0x2
+ Tx1RxDCRx0 = 0x3
+ Tx1RxDCRx1 = 0x4
+ Tx0RxE = 0x5
+ Tx1RxE = 0x6
+ HIZCRx0 = 0x7
+ HIZCRx1 = 0x8
+ TxDRxE = 0x9
+ StandbyIgnore = 0xf
+)
+
+const (
+ IOSTERM_SAME = 0x0
+ IOSTERM_DISPUPD = 0x1
+ IOSTERM_ENPD = 0x2
+ IOSTERM_ENPU = 0x3
+)
+
+const (
+ TRIG_LEVEL = 0
+ TRIG_EDGE_SINGLE = 1
+ TRIG_OFF = 2
+ TRIG_EDGE_BOTH = 3
+)
+
+const (
+ RST_PWROK = 0
+ RST_DEEP = 1
+ RST_PLTRST = 2
+ RST_RSMRST = 3
+)
+
+// PlatformSpecific - platform-specific interface
+type PlatformSpecific interface {
+ RemmapRstSrc()
+ Pull()
+ GpiMacroAdd()
+ GpoMacroAdd()
+ NativeFunctionMacroAdd()
+ NoConnMacroAdd()
+}
+
+// Macro - contains macro information and methods
+// Platform : platform-specific interface
+// padID : pad ID string
+// str : macro string entirely
+// Reg : structure of configuration register values and their masks
+type Macro struct {
+ Platform PlatformSpecific
+ Reg [MAX_DW_NUM]Register
+ padID string
+ str string
+ ownership uint8
+ Fields
+}
+
+var instanceMacro *Macro
+var once sync.Once
+
+// GetInstance returns singleton
+func GetInstanceMacro(p PlatformSpecific, f Fields) *Macro {
+ once.Do(func() {
+ instanceMacro = &Macro{ Platform : p, Fields : f }
+ })
+ return instanceMacro
+}
+
+func GetMacro() *Macro {
+ return GetInstanceMacro(nil, nil)
+}
+
+func (macro *Macro) PadIdGet() string {
+ return macro.padID
+}
+
+func (macro *Macro) PadIdSet(padid string) *Macro {
+ macro.padID = padid
+ return macro
+}
+
+func (macro *Macro) SetPadOwnership(own uint8) *Macro {
+ macro.ownership = own
+ return macro
+}
+
+func (macro *Macro) IsOwnershipDriver() bool {
+ return macro.ownership == PAD_OWN_DRIVER
+}
+
+// returns <Register> data configuration structure
+// number : register number
+func (macro *Macro) Register(number uint8) *Register {
+ return ¯o.Reg[number]
+}
+
+// add a string to macro
+func (macro *Macro) Add(str string) *Macro {
+ macro.str += str
+ return macro
+}
+
+// set a string in a macro instead of its previous contents
+func (macro *Macro) Set(str string) *Macro {
+ macro.str = str
+ return macro
+}
+
+// get macro string
+func (macro *Macro) Get() string {
+ return macro.str
+}
+
+// set a string in a macro instead of its previous contents
+func (macro *Macro) Clear() *Macro {
+ macro.Set("")
+ return macro
+}
+
+// Adds PAD Id to the macro as a new argument
+// return: Macro
+func (macro *Macro) Id() *Macro {
+ return macro.Add(macro.padID)
+}
+
+// Add Separator to macro if needed
+func (macro *Macro) Separator() *Macro {
+ str := macro.Get()
+ c := str[len(str)-1]
+ if c != '(' && c != '_' {
+ macro.Add(", ")
+ }
+ return macro
+}
+
+// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument
+// return: Macro
+func (macro *Macro) Rstsrc() *Macro {
+ dw0 := macro.Register(PAD_CFG_DW0)
+ var resetsrc = map[uint8]string {
+ 0: "PWROK",
+ 1: "DEEP",
+ 2: "PLTRST",
+ 3: "RSMRST",
+ }
+ return macro.Separator().Add(resetsrc[dw0.GetResetConfig()])
+}
+
+// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
+// return: Macro
+func (macro *Macro) Pull() *Macro {
+ macro.Platform.Pull()
+ return macro
+}
+
+// Adds Pad GPO value to macro string as a new argument
+// return: Macro
+func (macro *Macro) Val() *Macro {
+ dw0 := macro.Register(PAD_CFG_DW0)
+ return macro.Separator().Add(strconv.Itoa(int(dw0.GetGPIOTXState())))
+}
+
+// Adds Pad GPO value to macro string as a new argument
+// return: Macro
+func (macro *Macro) Trig() *Macro {
+ dw0 := macro.Register(PAD_CFG_DW0)
+ var trig = map[uint8]string{
+ 0x0: "LEVEL",
+ 0x1: "EDGE_SINGLE",
+ 0x2: "OFF",
+ 0x3: "EDGE_BOTH",
+ }
+ return macro.Separator().Add(trig[dw0.GetRXLevelEdgeConfiguration()])
+}
+
+// Adds Pad Polarity Inversion Stage (RXINV) to macro string as a new argument
+// return: Macro
+func (macro *Macro) Invert() *Macro {
+ macro.Separator()
+ if macro.Register(PAD_CFG_DW0).GetRxInvert() !=0 {
+ return macro.Add("INVERT")
+ }
+ return macro.Add("NONE")
+}
+
+// Adds input/output buffer state
+// return: Macro
+func (macro *Macro) Bufdis() *Macro {
+ var buffDisStat = map[uint8]string{
+ 0x0: "NO_DISABLE", // both buffers are enabled
+ 0x1: "TX_DISABLE", // output buffer is disabled
+ 0x2: "RX_DISABLE", // input buffer is disabled
+ 0x3: "TX_RX_DISABLE", // both buffers are disabled
+ }
+ state := macro.Register(PAD_CFG_DW0).GetGPIORxTxDisableStatus()
+ return macro.Separator().Add(buffDisStat[state])
+}
+
+// Adds macro to set the host software ownership
+// return: Macro
+func (macro *Macro) Own() *Macro {
+ if macro.IsOwnershipDriver() {
+ return macro.Separator().Add("DRIVER")
+ }
+ return macro.Separator().Add("ACPI")
+}
+
+//Adds pad native function (PMODE) as a new argument
+//return: Macro
+func (macro *Macro) Padfn() *Macro {
+ dw0 := macro.Register(PAD_CFG_DW0)
+ nfnum := int(dw0.GetPadMode())
+ if nfnum != 0 {
+ return macro.Separator().Add("NF" + strconv.Itoa(nfnum))
+ }
+ // GPIO used only for PAD_FUNC(x) macro
+ return macro.Add("GPIO")
+}
+
+// Add a line to the macro that defines IO Standby State
+// return: macro
+func (macro *Macro) IOSstate() *Macro {
+ var stateMacro = map[uint8]string{
+ TxLASTRxE: "TxLASTRxE",
+ Tx0RxDCRx0: "Tx0RxDCRx0",
+ Tx0RxDCRx1: "Tx0RxDCRx1",
+ Tx1RxDCRx0: "Tx1RxDCRx0",
+ Tx1RxDCRx1: "Tx1RxDCRx1",
+ Tx0RxE: "Tx0RxE",
+ Tx1RxE: "Tx1RxE",
+ HIZCRx0: "HIZCRx0",
+ HIZCRx1: "HIZCRx1",
+ TxDRxE: "TxDRxE",
+ StandbyIgnore: "IGNORE",
+ }
+ dw1 := macro.Register(PAD_CFG_DW1)
+ str, valid := stateMacro[dw1.GetIOStandbyState()]
+ if !valid {
+ // ignore setting for incorrect value
+ str = "IGNORE"
+ }
+ return macro.Separator().Add(str)
+}
+
+// Add a line to the macro that defines IO Standby Termination
+// return: macro
+func (macro *Macro) IOTerm() *Macro {
+ var ioTermMacro = map[uint8]string{
+ IOSTERM_SAME: "SAME",
+ IOSTERM_DISPUPD: "DISPUPD",
+ IOSTERM_ENPD: "ENPD",
+ IOSTERM_ENPU: "ENPU",
+ }
+ dw1 := macro.Register(PAD_CFG_DW1)
+ return macro.Separator().Add(ioTermMacro[dw1.GetIOStandbyTermination()])
+}
+
+// Check created macro
+func (macro *Macro) check() *Macro {
+ if !macro.Register(PAD_CFG_DW0).MaskCheck() {
+ return macro.GenerateFields()
+ }
+ return macro
+}
+
+// or - Set " | " if its needed
+func (macro *Macro) Or() *Macro {
+
+ if str := macro.Get(); str[len(str) - 1] == ')' {
+ macro.Add(" | ")
+ }
+ return macro
+}
+
+// AddToMacroIgnoredMask - Print info about ignored field mask
+// title - warning message
+func (macro *Macro) AddToMacroIgnoredMask() *Macro {
+ if config.InfoLevelGet() < 4 || config.IsFspStyleMacro() {
+ return macro
+ }
+ dw0 := macro.Register(PAD_CFG_DW0)
+ dw1 := macro.Register(PAD_CFG_DW1)
+ // Get mask of ignored bit fields.
+ dw0Ignored := dw0.IgnoredFieldsGet()
+ dw1Ignored := dw1.IgnoredFieldsGet()
+ if dw0Ignored != 0 {
+ dw0temp := dw0.ValueGet()
+ dw0.ValueSet(dw0Ignored)
+ macro.Add("\n\t/* DW0 : ")
+ macro.Fields.DecodeDW0()
+ macro.Add(" - IGNORED */")
+ dw0.ValueSet(dw0temp)
+ }
+ if dw1Ignored != 0 {
+ dw1temp := dw1.ValueGet()
+ dw1.ValueSet(dw1Ignored)
+ macro.Add("\n\t/* DW1 : ")
+ macro.Fields.DecodeDW1()
+ macro.Add(" - IGNORED */")
+ dw1.ValueSet(dw1temp)
+ }
+ return macro
+}
+
+// GenerateFields - generate bitfield macros
+func (macro *Macro) GenerateFields() *Macro {
+ dw0 := macro.Register(PAD_CFG_DW0)
+ dw1 := macro.Register(PAD_CFG_DW1)
+
+ // Get mask of ignored bit fields.
+ dw0Ignored := dw0.IgnoredFieldsGet()
+ dw1Ignored := dw1.IgnoredFieldsGet()
+
+ if config.InfoLevelGet() <= 1 {
+ macro.Clear()
+ } else if config.InfoLevelGet() >= 3 {
+ // Add string of reference macro as a comment
+ reference := macro.Get()
+ macro.Clear()
+ macro.Add("/* ").Add(reference).Add(" */")
+ macro.AddToMacroIgnoredMask()
+ macro.Add("\n\t")
+ }
+ if config.AreFieldsIgnored() {
+ // Consider bit fields that should be ignored when regenerating
+ // advansed macros
+ var tempVal uint32 = dw0.ValueGet() & ^dw0Ignored
+ dw0.ValueSet(tempVal)
+
+ tempVal = dw1.ValueGet() & ^dw1Ignored
+ dw1.ValueSet(tempVal)
+ }
+
+ macro.Fields.GenerateString()
+ return macro
+}
+
+// Generate macro for bi-directional GPIO port
+func (macro *Macro) Bidirection() {
+ dw1 := macro.Register(PAD_CFG_DW1)
+ ios := dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0
+ macro.Set("PAD_CFG_GPIO_BIDIRECT")
+ if ios {
+ macro.Add("_IOS")
+ }
+ // PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own)
+ macro.Add("(").Id().Val().Pull().Rstsrc().Trig()
+ if ios {
+ // PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own)
+ macro.IOSstate().IOTerm()
+ }
+ macro.Own().Add("),")
+}
+
+const (
+ rxDisable uint8 = 0x2
+ txDisable uint8 = 0x1
+)
+
+// Gets base string of current macro
+// return: string of macro
+func (macro *Macro) Generate() string {
+ dw0 := macro.Register(PAD_CFG_DW0)
+
+ macro.Platform.RemmapRstSrc()
+ macro.Set("PAD_CFG")
+ if dw0.GetPadMode() == 0 {
+ // GPIO
+ switch dw0.GetGPIORxTxDisableStatus() {
+ case txDisable:
+ macro.Platform.GpiMacroAdd() // GPI
+
+ case rxDisable:
+ macro.Platform.GpoMacroAdd() // GPO
+
+ case rxDisable | txDisable:
+ macro.Platform.NoConnMacroAdd() // NC
+
+ default:
+ macro.Bidirection()
+ }
+ } else {
+ macro.Platform.NativeFunctionMacroAdd()
+ }
+
+ if config.IsFieldsMacroUsed() {
+ // Clear control mask to generate advanced macro only
+ return macro.GenerateFields().Get()
+ }
+
+ if config.IsNonCheckingFlagUsed() {
+ macro.AddToMacroIgnoredMask()
+ return macro.Get()
+ }
+
+ return macro.check().Get()
+}
diff --git a/util/intelp2m/platforms/common/register.go b/util/intelp2m/platforms/common/register.go
new file mode 100644
index 0000000..2aa51b9
--- /dev/null
+++ b/util/intelp2m/platforms/common/register.go
@@ -0,0 +1,262 @@
+package common
+
+// Bit field constants for PAD_CFG_DW0 register
+const (
+ AllFields uint32 = 0xffffffff
+
+ PadRstCfgShift uint8 = 30
+ PadRstCfgMask uint32 = 0x3 << PadRstCfgShift
+
+ RxPadStateSelectShift uint8 = 29
+ RxPadStateSelectMask uint32 = 0x1 << RxPadStateSelectShift
+
+ RxRawOverrideTo1Shift uint8 = 28
+ RxRawOverrideTo1Mask uint32 = 0x1 << RxRawOverrideTo1Shift
+
+ RxLevelEdgeConfigurationShift uint8 = 25
+ RxLevelEdgeConfigurationMask uint32 = 0x3 << RxLevelEdgeConfigurationShift
+
+ RxInvertShift uint8 = 23
+ RxInvertMask uint32 = 0x1 << RxInvertShift
+
+ RxTxEnableConfigShift uint8 = 21
+ RxTxEnableConfigMask uint32 = 0x3 << RxTxEnableConfigShift
+
+ InputRouteIOxApicShift uint8 = 20
+ InputRouteIOxApicMask uint32 = 0x1 << InputRouteIOxApicShift
+
+ InputRouteSCIShift uint8 = 19
+ InputRouteSCIMask uint32 = 0x1 << InputRouteSCIShift
+
+ InputRouteSMIShift uint8 = 18
+ InputRouteSMIMask uint32 = 0x1 << InputRouteSMIShift
+
+ InputRouteNMIShift uint8 = 17
+ InputRouteNMIMask uint32 = 0x1 << InputRouteNMIShift
+
+ PadModeShift uint8 = 10
+ PadModeMask uint32 = 0x7 << PadModeShift
+
+ RxTxBufDisableShift uint8 = 8
+ RxTxBufDisableMask uint32 = 0x3 << RxTxBufDisableShift
+
+ RxStateShift uint8 = 1
+ RxStateMask uint32 = 0x1 << RxStateShift
+
+ TxStateMask uint32 = 0x1
+)
+
+// config DW registers
+const (
+ PAD_CFG_DW0 = 0
+ PAD_CFG_DW1 = 1
+ MAX_DW_NUM = 2
+)
+
+// Register - configuration data structure based on DW0/1 dw value
+// value : register value
+// mask : bit fileds mask
+// roFileds : read only fields mask
+type Register struct {
+ value uint32
+ mask uint32
+ roFileds uint32
+}
+
+func (reg *Register) ValueSet(value uint32) *Register {
+ reg.value = value
+ return reg
+}
+
+func (reg *Register) ValueGet() uint32 {
+ return reg.value
+}
+
+func (reg *Register) ReadOnlyFieldsSet(fileldMask uint32) *Register {
+ reg.roFileds = fileldMask
+ return reg
+}
+
+func (reg *Register) ReadOnlyFieldsGet() uint32 {
+ return reg.roFileds
+}
+
+// Check the mask of the new macro
+// Returns true if the macro is generated correctly
+func (reg *Register) MaskCheck() bool {
+ mask := ^(reg.mask | reg.roFileds)
+ return reg.value&mask == 0
+}
+
+// getResetConfig - get Reset Configuration from PADRSTCFG field in PAD_CFG_DW0_GPx register
+func (reg *Register) getFieldVal(mask uint32, shift uint8) uint8 {
+ reg.mask |= mask
+ return uint8((reg.value & mask) >> shift)
+}
+
+// CntrMaskFieldsClear - clear filed in control mask
+// fieldMask - mask of the field to be cleared
+func (reg *Register) CntrMaskFieldsClear(fieldMask uint32) {
+ reg.mask &= ^fieldMask;
+}
+
+// IgnoredFieldsGet - return mask of unchecked (ignored) fields.
+// These bit fields were not read when the macro was
+// generated.
+// return
+// mask of ignored bit field
+func (reg *Register) IgnoredFieldsGet() uint32 {
+ mask := reg.mask | reg.roFileds
+ return reg.value & ^mask
+}
+
+// getResetConfig - returns type reset source for corresponding pad
+// PADRSTCFG field in PAD_CFG_DW0 register
+func (reg *Register) GetResetConfig() uint8 {
+ return reg.getFieldVal(PadRstCfgMask, PadRstCfgShift)
+}
+
+// getRXPadStateSelect - returns RX Pad State (RXINV)
+// 0 = Raw RX pad state directly from RX buffer
+// 1 = Internal RX pad state
+func (reg *Register) GetRXPadStateSelect() uint8 {
+ return reg.getFieldVal(RxPadStateSelectMask, RxPadStateSelectShift)
+}
+
+// getRXRawOverrideStatus - returns 1 if the selected pad state is being
+// overridden to '1' (RXRAW1 field)
+func (reg *Register) GetRXRawOverrideStatus() uint8 {
+ return reg.getFieldVal(RxRawOverrideTo1Mask, RxRawOverrideTo1Shift)
+}
+
+// getRXLevelEdgeConfiguration - returns RX Level/Edge Configuration (RXEVCFG)
+// 0h = Level, 1h = Edge, 2h = Drive '0', 3h = Reserved (implement as setting 0h)
+func (reg *Register) GetRXLevelEdgeConfiguration() uint8 {
+ return reg.getFieldVal(RxLevelEdgeConfigurationMask, RxLevelEdgeConfigurationShift)
+}
+
+// GetRxInvert - returns RX Invert state (RXINV)
+// 1 - Inversion, 0 - No inversion
+func (reg *Register) GetRxInvert() uint8 {
+ return reg.getFieldVal(RxInvertMask, RxInvertShift)
+}
+
+// getRxTxEnableConfig - returns RX/TX Enable Config (RXTXENCFG)
+// 0 = Function defined in Pad Mode controls TX and RX Enables
+// 1 = Function controls TX Enable and RX Disabled with RX drive 0 internally
+// 2 = Function controls TX Enable and RX Disabled with RX drive 1 internally
+// 3 = Function controls TX Enabled and RX is always enabled
+func (reg *Register) GetRxTxEnableConfig() uint8 {
+ return reg.getFieldVal(RxTxEnableConfigMask, RxTxEnableConfigShift)
+}
+
+// getGPIOInputRouteIOxAPIC - returns 1 if the pad can be routed to cause
+// peripheral IRQ when configured in GPIO input mode.
+func (reg *Register) GetGPIOInputRouteIOxAPIC() uint8 {
+ return reg.getFieldVal(InputRouteIOxApicMask, InputRouteIOxApicShift)
+}
+
+// getGPIOInputRouteSCI - returns 1 if the pad can be routed to cause SCI when
+// configured in GPIO input mode.
+func (reg *Register) GetGPIOInputRouteSCI() uint8 {
+ return reg.getFieldVal(InputRouteSCIMask, InputRouteSCIShift)
+}
+
+// getGPIOInputRouteSMI - returns 1 if the pad can be routed to cause SMI when
+// configured in GPIO input mode
+func (reg *Register) GetGPIOInputRouteSMI() uint8 {
+ return reg.getFieldVal(InputRouteSMIMask, InputRouteSMIShift)
+}
+
+// getGPIOInputRouteNMI - returns 1 if the pad can be routed to cause NMI when
+// configured in GPIO input mode
+func (reg *Register) GetGPIOInputRouteNMI() uint8 {
+ return reg.getFieldVal(InputRouteNMIMask, InputRouteNMIShift)
+}
+
+// getPadMode - reutrns pad mode or one of the native functions
+// 0h = GPIO control the Pad.
+// 1h = native function 1, if applicable, controls the Pad
+// 2h = native function 2, if applicable, controls the Pad
+// 3h = native function 3, if applicable, controls the Pad
+// 4h = enable GPIO blink/PWM capability if applicable
+func (reg *Register) GetPadMode() uint8 {
+ return reg.getFieldVal(PadModeMask, PadModeShift)
+}
+
+// getGPIORxTxDisableStatus - returns GPIO RX/TX buffer state (GPIORXDIS | GPIOTXDIS)
+// 0 - both are enabled, 1 - TX Disable, 2 - RX Disable, 3 - both are disabled
+func (reg *Register) GetGPIORxTxDisableStatus() uint8 {
+ return reg.getFieldVal(RxTxBufDisableMask, RxTxBufDisableShift)
+}
+
+// getGPIORXState - returns GPIO RX State (GPIORXSTATE)
+func (reg *Register) GetGPIORXState() uint8 {
+ return reg.getFieldVal(RxStateMask, RxStateShift)
+}
+
+// getGPIOTXState - returns GPIO TX State (GPIOTXSTATE)
+func (reg *Register) GetGPIOTXState() uint8 {
+ return reg.getFieldVal(TxStateMask, 0)
+}
+
+// Bit field constants for PAD_CFG_DW1 register
+const (
+ PadTolShift uint8 = 25
+ PadTolMask uint32 = 0x1 << PadTolShift
+
+ IOStandbyStateShift uint8 = 14
+ IOStandbyStateMask uint32 = 0xF << IOStandbyStateShift
+
+ TermShift uint8 = 10
+ TermMask uint32 = 0xF << TermShift
+
+ IOStandbyTerminationShift uint8 = 8
+ IOStandbyTerminationMask uint32 = 0x3 << IOStandbyTerminationShift
+
+ InterruptSelectMask uint32 = 0xFF
+)
+
+// GetPadTol
+func (reg *Register) GetPadTol() uint8 {
+ return reg.getFieldVal(PadTolMask, PadTolShift)
+}
+
+// getIOStandbyState - return IO Standby State (IOSSTATE)
+// 0 = Tx enabled driving last value driven, Rx enabled
+// 1 = Tx enabled driving 0, Rx disabled and Rx driving 0 back to its controller internally
+// 2 = Tx enabled driving 0, Rx disabled and Rx driving 1 back to its controller internally
+// 3 = Tx enabled driving 1, Rx disabled and Rx driving 0 back to its controller internally
+// 4 = Tx enabled driving 1, Rx disabled and Rx driving 1 back to its controller internally
+// 5 = Tx enabled driving 0, Rx enabled
+// 6 = Tx enabled driving 1, Rx enabled
+// 7 = Hi-Z, Rx driving 0 back to its controller internally
+// 8 = Hi-Z, Rx driving 1 back to its controller internally
+// 9 = Tx disabled, Rx enabled
+// 15 = IO-Standby is ignored for this pin (same as functional mode)
+// Others reserved
+func (reg *Register) GetIOStandbyState() uint8 {
+ return reg.getFieldVal(IOStandbyStateMask, IOStandbyStateShift)
+}
+
+// getIOStandbyTermination - return IO Standby Termination (IOSTERM)
+// 0 = Same as functional mode (no change)
+// 1 = Disable Pull-up and Pull-down (no on-die termination)
+// 2 = Enable Pull-down
+// 3 = Enable Pull-up
+func (reg *Register) GetIOStandbyTermination() uint8 {
+ return reg.getFieldVal(IOStandbyTerminationMask, IOStandbyTerminationShift)
+}
+
+// getTermination - returns the pad termination state defines the different weak
+// pull-up and pull-down settings that are supported by the buffer
+// 0000 = none; 0010 = 5k PD; 0100 = 20k PD; 1010 = 5k PU; 1100 = 20k PU;
+// 1111 = Native controller selected
+func (reg *Register) GetTermination() uint8 {
+ return reg.getFieldVal(TermMask, TermShift)
+}
+
+// getInterruptSelect - returns Interrupt Line number from the GPIO controller
+func (reg *Register) GetInterruptSelect() uint8 {
+ return reg.getFieldVal(InterruptSelectMask, 0)
+}
diff --git a/util/intelp2m/platforms/lbg/macro.go b/util/intelp2m/platforms/lbg/macro.go
new file mode 100644
index 0000000..6b44a25
--- /dev/null
+++ b/util/intelp2m/platforms/lbg/macro.go
@@ -0,0 +1,102 @@
+package lbg
+
+import "fmt"
+
+// Local packages
+import "../../config"
+import "../../fields"
+import "../common"
+import "../snr"
+
+const (
+ PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
+ PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
+)
+
+const (
+ PAD_CFG_DW0 = common.PAD_CFG_DW0
+ PAD_CFG_DW1 = common.PAD_CFG_DW1
+ MAX_DW_NUM = common.MAX_DW_NUM
+)
+
+type InheritanceMacro interface {
+ Pull()
+ GpiMacroAdd()
+ GpoMacroAdd()
+ NativeFunctionMacroAdd()
+ NoConnMacroAdd()
+}
+
+type PlatformSpecific struct {
+ InheritanceMacro
+ InheritanceTemplate
+}
+
+// RemmapRstSrc - remmap Pad Reset Source Config
+func (PlatformSpecific) RemmapRstSrc() {
+ macro := common.GetMacro()
+ if config.TemplateGet() != config.TempInteltool {
+ // Use reset source remapping only if the input file is inteltool.log dump
+ return
+ }
+ dw0 := macro.Register(PAD_CFG_DW0)
+ var remapping = map[uint8]uint32{
+ 0: common.RST_RSMRST << common.PadRstCfgShift,
+ 1: common.RST_DEEP << common.PadRstCfgShift,
+ 2: common.RST_PLTRST << common.PadRstCfgShift,
+ }
+ resetsrc, valid := remapping[dw0.GetResetConfig()]
+ if valid {
+ // dw0.SetResetConfig(resetsrc)
+ ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()]
+ dw0.ValueSet(ResetConfigFieldVal)
+ } else {
+ fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet())
+ }
+ dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+}
+
+// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
+// as a new argument
+func (platform PlatformSpecific) Pull() {
+ platform.InheritanceMacro.Pull()
+}
+
+// Adds PAD_CFG_GPI macro with arguments
+func (platform PlatformSpecific) GpiMacroAdd() {
+ platform.InheritanceMacro.GpiMacroAdd()
+}
+
+// Adds PAD_CFG_GPO macro with arguments
+func (platform PlatformSpecific) GpoMacroAdd() {
+ platform.InheritanceMacro.GpoMacroAdd()
+}
+
+// Adds PAD_CFG_NF macro with arguments
+func (platform PlatformSpecific) NativeFunctionMacroAdd() {
+ platform.InheritanceMacro.NativeFunctionMacroAdd()
+}
+
+// Adds PAD_NC macro
+func (platform PlatformSpecific) NoConnMacroAdd() {
+ platform.InheritanceMacro.NoConnMacroAdd()
+}
+
+// GenMacro - generate pad macro
+// dw0 : DW0 config register value
+// dw1 : DW1 config register value
+// return: string of macro
+// error
+func (platform PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
+ // The GPIO controller architecture in Lewisburg and Sunrise are very similar,
+ // so we will inherit some platform-dependent functions from Sunrise.
+ macro := common.GetInstanceMacro(PlatformSpecific{InheritanceMacro : snr.PlatformSpecific{}},
+ fields.InterfaceGet())
+ macro.Clear()
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ macro.PadIdSet(id).SetPadOwnership(ownership)
+ macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
+ macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
+ return macro.Generate()
+}
diff --git a/util/intelp2m/platforms/lbg/template.go b/util/intelp2m/platforms/lbg/template.go
new file mode 100644
index 0000000..74c39ef
--- /dev/null
+++ b/util/intelp2m/platforms/lbg/template.go
@@ -0,0 +1,22 @@
+package lbg
+
+type InheritanceTemplate interface {
+ GroupNameExtract(line string) (bool, string)
+ KeywordCheck(line string) bool
+}
+
+// GroupNameExtract - This function extracts the group ID, if it exists in a row
+// line : string from the configuration file
+// return
+// bool : true if the string contains a group identifier
+// string : group identifier
+func (platform PlatformSpecific) GroupNameExtract(line string) (bool, string) {
+ return platform.InheritanceTemplate.GroupNameExtract(line)
+}
+
+// KeywordCheck - This function is used to filter parsed lines of the configuration file and
+// returns true if the keyword is contained in the line.
+// line : string from the configuration file
+func (platform PlatformSpecific) KeywordCheck(line string) bool {
+ return platform.InheritanceTemplate.KeywordCheck(line)
+}
diff --git a/util/intelp2m/platforms/snr/macro.go b/util/intelp2m/platforms/snr/macro.go
new file mode 100644
index 0000000..86cc7b7
--- /dev/null
+++ b/util/intelp2m/platforms/snr/macro.go
@@ -0,0 +1,278 @@
+package snr
+
+import "strings"
+import "fmt"
+
+// Local packages
+import "../common"
+import "../../config"
+import "../../fields"
+
+const (
+ PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
+ PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
+)
+
+const (
+ PAD_CFG_DW0 = common.PAD_CFG_DW0
+ PAD_CFG_DW1 = common.PAD_CFG_DW1
+ MAX_DW_NUM = common.MAX_DW_NUM
+)
+
+type PlatformSpecific struct {}
+
+// RemmapRstSrc - remmap Pad Reset Source Config
+func (PlatformSpecific) RemmapRstSrc() {
+ macro := common.GetMacro()
+ if config.TemplateGet() != config.TempInteltool {
+ // Use reset source remapping only if the input file is inteltool.log dump
+ return
+ }
+ if strings.Contains(macro.PadIdGet(), "GPD") {
+ // See reset map for the Sunrise GPD Group in the Community 2:
+ // https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/gpio.c#L15
+ // remmap is not required because it is the same as common.
+ return
+ }
+
+ dw0 := macro.Register(PAD_CFG_DW0)
+ var remapping = map[uint8]uint32{
+ 0: common.RST_RSMRST << common.PadRstCfgShift,
+ 1: common.RST_DEEP << common.PadRstCfgShift,
+ 2: common.RST_PLTRST << common.PadRstCfgShift,
+ }
+ resetsrc, valid := remapping[dw0.GetResetConfig()]
+ if valid {
+ // dw0.SetResetConfig(resetsrc)
+ ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()]
+ dw0.ValueSet(ResetConfigFieldVal)
+ } else {
+ fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet())
+ }
+ dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+}
+
+// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
+// as a new argument
+func (PlatformSpecific) Pull() {
+ macro := common.GetMacro()
+ dw1 := macro.Register(PAD_CFG_DW1)
+ var pull = map[uint8]string{
+ 0x0: "NONE",
+ 0x2: "5K_PD",
+ 0x4: "20K_PD",
+ 0x9: "1K_PU",
+ 0xa: "5K_PU",
+ 0xb: "2K_PU",
+ 0xc: "20K_PU",
+ 0xd: "667_PU",
+ 0xf: "NATIVE",
+ }
+ str, valid := pull[dw1.GetTermination()]
+ if !valid {
+ str = "INVALID"
+ fmt.Println("Error",
+ macro.PadIdGet(),
+ " invalid TERM value = ",
+ int(dw1.GetTermination()))
+ }
+ macro.Separator().Add(str)
+}
+
+// Generate macro to cause peripheral IRQ when configured in GPIO input mode
+func ioApicRoute() bool {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
+ return false
+ }
+
+ macro.Add("_APIC")
+ if dw0.GetRXLevelEdgeConfiguration() == common.TRIG_LEVEL {
+ if dw0.GetRxInvert() != 0 {
+ // PAD_CFG_GPI_APIC_INVERT(pad, pull, rst)
+ macro.Add("_INVERT")
+ }
+ // PAD_CFG_GPI_APIC(pad, pull, rst)
+ macro.Add("(").Id().Pull().Rstsrc().Add("),")
+ return true
+ }
+
+ // e.g. PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
+ macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().Add(", TxLASTRxE, SAME),")
+ return true
+}
+
+// Generate macro to cause NMI when configured in GPIO input mode
+func nmiRoute() bool {
+ macro := common.GetMacro()
+ if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 {
+ return false
+ }
+ // PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
+ macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
+ return true
+}
+
+// Generate macro to cause SCI when configured in GPIO input mode
+func sciRoute() bool {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ if dw0.GetGPIOInputRouteSCI() == 0 {
+ return false
+ }
+ // e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
+ if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 {
+ // e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
+ // #define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \
+ // PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv)
+ macro.Add("_ACPI")
+ }
+ macro.Add("_SCI").Add("(").Id().Pull().Rstsrc()
+ if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 {
+ macro.Trig()
+ }
+ macro.Invert().Add("),")
+ return true
+}
+
+// Generate macro to cause SMI when configured in GPIO input mode
+func smiRoute() bool {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ if dw0.GetGPIOInputRouteSMI() == 0 {
+ return false
+ }
+ if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 {
+ // e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
+ macro.Add("_ACPI")
+ }
+ macro.Add("_SMI").Add("(").Id().Pull().Rstsrc()
+ if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 {
+ // e.g. PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE),
+ macro.Trig()
+ }
+ macro.Invert().Add("),")
+ return true
+}
+
+// Adds PAD_CFG_GPI macro with arguments
+func (PlatformSpecific) GpiMacroAdd() {
+ macro := common.GetMacro()
+ var ids []string
+ macro.Set("PAD_CFG_GPI")
+ for routeid, isRoute := range map[string]func() (bool) {
+ "IOAPIC": ioApicRoute,
+ "SCI": sciRoute,
+ "SMI": smiRoute,
+ "NMI": nmiRoute,
+ } {
+ if isRoute() {
+ ids = append(ids, routeid)
+ }
+ }
+
+ switch argc := len(ids); argc {
+ case 0:
+ // e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
+ macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
+ case 1:
+ // GPI with IRQ route
+ if config.AreFieldsIgnored() {
+ // Set Host Software Ownership to ACPI mode
+ macro.SetPadOwnership(common.PAD_OWN_ACPI)
+ }
+
+ case 2:
+ // PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
+ macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
+ macro.Add(", " + ids[0] + ", " + ids[1] + "),")
+ if config.AreFieldsIgnored() {
+ // Set Host Software Ownership to ACPI mode
+ macro.SetPadOwnership(common.PAD_OWN_ACPI)
+ }
+ default:
+ // Clear the control mask so that the check fails and "Advanced" macro is
+ // generated
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ }
+}
+
+// Adds PAD_CFG_GPO macro with arguments
+func (PlatformSpecific) GpoMacroAdd() {
+ macro := common.GetMacro()
+ dw0 := macro.Register(PAD_CFG_DW0)
+ term := macro.Register(PAD_CFG_DW1).GetTermination()
+
+ // #define PAD_CFG_GPO(pad, val, rst) \
+ // _PAD_CFG_STRUCT(pad, \
+ // PAD_FUNC(GPIO) | PAD_RESET(rst) | \
+ // PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
+ // PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE))
+ if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+ dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+ }
+ macro.Set("PAD_CFG")
+ if macro.IsOwnershipDriver() {
+ // PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull)
+ macro.Add("_GPO_GPIO_DRIVER").Add("(").Id().Val().Rstsrc().Pull().Add("),")
+ return
+ }
+ if term != 0 {
+ // e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
+ macro.Add("_TERM")
+ }
+ macro.Add("_GPO").Add("(").Id().Val()
+ if term != 0 {
+ macro.Pull()
+ }
+ macro.Rstsrc().Add("),")
+}
+
+// Adds PAD_CFG_NF macro with arguments
+func (PlatformSpecific) NativeFunctionMacroAdd() {
+ macro := common.GetMacro()
+ // e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
+ macro.Set("PAD_CFG_NF")
+ if macro.Register(PAD_CFG_DW1).GetPadTol() != 0 {
+ macro.Add("_1V8")
+ }
+ macro.Add("(").Id().Pull().Rstsrc().Padfn().Add("),")
+}
+
+// Adds PAD_NC macro
+func (PlatformSpecific) NoConnMacroAdd() {
+ macro := common.GetMacro()
+ // #define PAD_NC(pad, pull)
+ // _PAD_CFG_STRUCT(pad,
+ // PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
+ // PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)),
+ dw0 := macro.Register(PAD_CFG_DW0)
+
+ // Some fields of the configuration registers are hidden inside the macros,
+ // we should check them to update the corresponding bits in the control mask.
+ if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF {
+ dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask)
+ }
+ if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP
+ dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
+ }
+
+ macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
+}
+
+// GenMacro - generate pad macro
+// dw0 : DW0 config register value
+// dw1 : DW1 config register value
+// return: string of macro
+// error
+func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
+ macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet())
+ macro.Clear()
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
+ macro.PadIdSet(id).SetPadOwnership(ownership)
+ macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
+ macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
+ return macro.Generate()
+}
diff --git a/util/intelp2m/platforms/snr/template.go b/util/intelp2m/platforms/snr/template.go
new file mode 100644
index 0000000..c6c39b1
--- /dev/null
+++ b/util/intelp2m/platforms/snr/template.go
@@ -0,0 +1,37 @@
+package snr
+
+import "strings"
+
+// GroupNameExtract - This function extracts the group ID, if it exists in a row
+// line : string from the configuration file
+// return
+// bool : true if the string contains a group identifier
+// string : group identifier
+func (PlatformSpecific) GroupNameExtract(line string) (bool, string) {
+ for _, groupKeyword := range []string{
+ "GPP_A", "GPP_B", "GPP_F",
+ "GPP_C", "GPP_D", "GPP_E",
+ "GPD", "GPP_I",
+ "GPP_J", "GPP_K",
+ "GPP_G", "GPP_H", "GPP_L",
+ } {
+ if strings.Contains(line, groupKeyword) {
+ return true, groupKeyword
+ }
+ }
+ return false, ""
+}
+
+// KeywordCheck - This function is used to filter parsed lines of the configuration file and
+// returns true if the keyword is contained in the line.
+// line : string from the configuration file
+func (PlatformSpecific) KeywordCheck(line string) bool {
+ for _, keyword := range []string{
+ "GPP_", "GPD",
+ } {
+ if strings.Contains(line, keyword) {
+ return true
+ }
+ }
+ return false
+}
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