Arthur Heymans has uploaded this change for review.

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soc/intel/braswell: select SOUTHBRIDGE_INTEL_COMMON

Use the sb/intel/common/reset.c implementation.

Change-Id: I9342f16c947d5e5eb768e426c5ab95c372f95c76
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/braswell/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/33204/1
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index ed5c972..b2702f0 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -33,7 +33,6 @@
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_HDA
- select SOC_INTEL_COMMON_RESET
select SMM_TSEG
select SMP
select SPI_FLASH
@@ -50,6 +49,7 @@
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
select CPU_INTEL_COMMON
+ select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS

config VBOOT

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9342f16c947d5e5eb768e426c5ab95c372f95c76
Gerrit-Change-Number: 33204
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-MessageType: newchange