Arthur Heymans has uploaded this change for review.

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cpu/intel/em64t_save_state: Fix smbase/smm_revision

Fix the offsets of smbase and smm_revision in the
em64t_smm_state_save_area_t struct. This follows the Intle 64 and
IA-32 manual and is tested to be the correct offset on a Intel core2
CPU.

Change-Id: I4055d61f8920967cede6e219f2658c54631c5dd1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/include/cpu/intel/em64t_save_state.h
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/36658/1
diff --git a/src/include/cpu/intel/em64t_save_state.h b/src/include/cpu/intel/em64t_save_state.h
index 1dd01a6..4e1f7a8 100644
--- a/src/include/cpu/intel/em64t_save_state.h
+++ b/src/include/cpu/intel/em64t_save_state.h
@@ -47,8 +47,8 @@

u8 reserved4[84];

- u32 smm_revision;
u32 smbase;
+ u32 smm_revision;

u16 io_restart;
u16 autohalt_restart;

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4055d61f8920967cede6e219f2658c54631c5dd1
Gerrit-Change-Number: 36658
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-MessageType: newchange