1 comment:
File src/soc/intel/alderlake/romstage/fsp_params.c:
Patch Set #23, Line 154: is_dev_enabled(dev)
There is no PCIE 6.x to present more CPU_RP... If you look up the device tree.. […]
At least for TGL, the EDS says that the CPU RP 6.0 does not support bifurcation. So, all lanes can be controlled only by controller 6.0. You will have to check the same for ADL to see what controllers exist and what lane configuration is supported.
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