Sridhar Siricilla has uploaded this change for review.

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soc/intel/common: Adds compressed RW blob to RW_A and RW_B

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ic4a8797946284359656d3b092fc55812a3de2d37
---
M src/soc/intel/common/block/cse/Makefile.inc
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/44822/1

diff --git a/src/soc/intel/common/block/cse/Makefile.inc b/src/soc/intel/common/block/cse/Makefile.inc
index 11cc3c2..7ea6fdc 100644
--- a/src/soc/intel/common/block/cse/Makefile.inc
+++ b/src/soc/intel/common/block/cse/Makefile.inc
@@ -11,4 +11,13 @@
 $(CSE_LITE_ME_RW)-file := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE))
 $(CSE_LITE_ME_RW)-name := $(CSE_LITE_ME_RW)
 $(CSE_LITE_ME_RW)-type := raw
+$(CSE_LITE_ME_RW)-compression := lzma
+
+
+CSE_LITE_ME_RW_VER = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VER_CBFS_NAME))
+regions-for-file-$(CSE_LITE_ME_RW_VER) = FW_MAIN_A,FW_MAIN_B
+cbfs-files-y += $(CSE_LITE_ME_RW_VER)
+$(CSE_LITE_ME_RW_VER)-file := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VER_FILE))
+$(CSE_LITE_ME_RW_VER)-name := $(CSE_LITE_ME_RW_VER)
+$(CSE_LITE_ME_RW_VER)-type := raw
 endif

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