Angel Pons has uploaded this change for review.
cpu/intel/model_206ax/finalize.c: Drop dead code
This code is not even being build-tested. Drop it before it grows moss.
Change-Id: I76bf20bb2ec1cdd7ffee4430c80609978afaa1a4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/cpu/intel/model_206ax/finalize.c
1 file changed, 0 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/43206/1
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index 10a95a2..c7579f1 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -16,24 +16,6 @@
if (cpuid_ecx(1) & (1 << 25))
msr_set_bit(MSR_FEATURE_CONFIG, 0);
-#ifdef LOCK_POWER_CONTROL_REGISTERS
- /*
- * Lock the power control registers.
- *
- * These registers can be left unlocked if modifying power
- * limits from the OS is desirable. Modifying power limits
- * from the OS can be especially useful for experimentation
- * during early phases of system bringup while the thermal
- * power envelope is being proven.
- */
-
- msr_set_bit(MSR_PP0_CURRENT_CONFIG, 31);
- msr_set_bit(MSR_PP1_CURRENT_CONFIG, 31);
- msr_set_bit(MSR_PKG_POWER_LIMIT, 63);
- msr_set_bit(MSR_PP0_POWER_LIMIT, 31);
- msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
-#endif
-
/* Lock TM interrupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);
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