1 comment:
File src/soc/intel/baytrail/romstage/raminit.c:
if (mp->mainboard.spd_addrs[i]) {
i2c_eeprom_read(mp->mainboard.spd_addrs[i],
0, SPD_SIZE, spd_buf[i]);
/* NOTE: the MRC expects both SPD pointers
to match */
mp->mainboard.dram_data[i] = spd_buf;
}
A single DIMM in channel 1 would surely fail. […]
(The 0xF0 and 0xF1 are fake SPD addresses the MRC's main function sets as markers for in memory SPD for channel 0 and 1.)
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