Wim Vervoorn uploaded patch set #3 to this change.

View Change

{drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoC

FSP logo handling used PcdLogoPtr and PcdLogoSize which are elements of
the chipset specific FSP structures.

Create soc_load_logo() which will pass the logo pointer and size.
This function will call fsp_load_logo which will load the logo.

BUG=NA
TEST= Build and verified logo is displayed on Facebook FBG1701

Change-Id: I86943e64ca1ddd05e7e88fc6b882cfd33b98272e
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
---
M src/drivers/intel/fsp1_1/include/fsp/ramstage.h
M src/drivers/intel/fsp1_1/logo.c
M src/drivers/intel/fsp1_1/ramstage.c
M src/soc/intel/braswell/chip.c
4 files changed, 34 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/37791/3

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I86943e64ca1ddd05e7e88fc6b882cfd33b98272e
Gerrit-Change-Number: 37791
Gerrit-PatchSet: 3
Gerrit-Owner: Wim Vervoorn <wvervoorn@eltan.com>
Gerrit-Reviewer: Frans Hendriks <fhendriks@eltan.com>
Gerrit-Reviewer: Huang Jin <huang.jin@intel.com>
Gerrit-Reviewer: Lee Leahy <leroy.p.leahy@intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Wim Vervoorn <wvervoorn@eltan.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset