Jonathan Zhang uploaded patch set #24 to this change.

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soc/intel/xeon_sp/cpx: configure FSP-M UPD parameters

Configure FSP-M UPD parameters.

TESTED=Boot CPX-SP based server.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Change-Id: I2d0762a742d8803c7396034e3244120c1e8ece67
---
M src/soc/intel/xeon_sp/cpx/romstage.c
1 file changed, 54 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/40385/24

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