Jonathan Neuschäfer has uploaded this change for review.

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arch/riscv: Unify trap return

Change-Id: I9de0c92b3f925e8f4db00d7281222a07db68b2ae
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
M src/arch/riscv/trap_handler.c
M src/arch/riscv/trap_util.S
2 files changed, 10 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/21763/1

diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index 4359ed9..78b98e4 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -69,7 +69,7 @@
 	}
 	tf->gpr[10] = returnValue;
 	write_csr(mepc, read_csr(mepc) + 4);
-	asm volatile("j supervisor_call_return");
+	asm volatile("j trap_return");
 }
 
 static const char *const exception_names[] = {
@@ -262,7 +262,7 @@
 
 	// return to where we came from
 	write_csr(mepc, read_csr(mepc) + 4);
-	asm volatile("j machine_call_return");
+	asm volatile("j trap_return");
 }
 
 void handle_misaligned_store(trapframe *tf) {
@@ -290,5 +290,5 @@
 
 	// return to where we came from
 	write_csr(mepc, read_csr(mepc) + 4);
-	asm volatile("j machine_call_return");
+	asm volatile("j trap_return");
 }
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 44cfab7..5add7ba 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -136,15 +136,10 @@
   save_tf
   move  a0,sp
   jal trap_handler
-  .global supervisor_call_return
-supervisor_call_return:
-  csrr a0, mscratch
-  restore_regs
-  # go back into supervisor call
-  mret
-  .global machine_call_return
-machine_call_return:
-    csrr a0, mscratch
-    restore_regs
-    # go back into machine call
-    mret
+
+	.global trap_return
+trap_return:
+	csrr	a0, mscratch
+	restore_regs
+	# go back to the previous mode
+	mret

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