Attention is currently required from: Shaunak Saha, Martin Roth, Angel Pons, Subrata Banik, Michael Niewöhner, Patrick Rudolph.

Tim Wawrzynczak uploaded patch set #23 to this change.

View Change

soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias pads

TGL boards using the Type-C subsystem for USB Type-C ports without a
retimer attached may require a DC bias on the aux lines for certain
modes to work. This patch adds native coreboot support for programming
the IOM to handle this DC bias via a simple devicetree
setting. Previously a UPD was required to tell the FSP which GPIOs were
used for the pullup and pulldown biases, but the API for this UPD was
effectively undocumented.

BUG=b:174116646
TEST=Verified on volteer2 that a Type-C flash drive is enumerated
succesfully on all ports. Verified all major power flows (boot, reboot,
powerdown and S0ix/suspend) still work as expected.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I70e36a41e760f4a435511c147cc5744a77dbccc0
---
M src/mainboard/google/volteer/variants/eldrid/overridetree.cb
M src/mainboard/google/volteer/variants/elemi/overridetree.cb
M src/mainboard/google/volteer/variants/lindar/overridetree.cb
M src/mainboard/google/volteer/variants/malefor/overridetree.cb
M src/mainboard/google/volteer/variants/voema/overridetree.cb
M src/mainboard/google/volteer/variants/volteer/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/overridetree.cb
M src/soc/intel/common/block/include/intelblocks/tcss.h
M src/soc/intel/common/block/tcss/tcss.c
M src/soc/intel/tigerlake/Makefile.inc
M src/soc/intel/tigerlake/chip.h
M src/soc/intel/tigerlake/fsp_params.c
A src/soc/intel/tigerlake/include/soc/tcss.h
13 files changed, 86 insertions(+), 31 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/51649/23

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