Felix Held submitted this change.

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Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, but someone else must approve Marshall Dawson: Looks good to me, approved
soc/amd/picasso: Up stack size to 40k for vboot hash buffer

Increasing the vboot hash buffer size greatly speeds up the SHA
calculations. Going from a standard 4k buffer to a 36k buffer
takes ~150ms of the boot and resume time.

TEST=Build & boot see that boot time has decreased.
BRANCH=Zork
BUG=b:169217270 - Zork: SHA calculation in vboot takes too long

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ibca868ad7be639c2a0ca1c4ba6d71123d8b83c92
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46902
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/picasso/memlayout_psp_verstage.ld
M src/soc/amd/picasso/psp_verstage/Makefile.inc
2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/soc/amd/picasso/memlayout_psp_verstage.ld b/src/soc/amd/picasso/memlayout_psp_verstage.ld
index e7a6c84..ca95cf8 100644
--- a/src/soc/amd/picasso/memlayout_psp_verstage.ld
+++ b/src/soc/amd/picasso/memlayout_psp_verstage.ld
@@ -19,15 +19,15 @@
* should be sufficient. This is just for the function mapping the
* actual stack.
*/
-#define PSP_VERSTAGE_TEMP_STACK_START 0x39000
+#define PSP_VERSTAGE_TEMP_STACK_START 0x32000
#define PSP_VERSTAGE_TEMP_STACK_SIZE 4K

/*
* The top of the stack must be 4k aligned, so set the bottom as 4k aligned
* and make the size a multiple of 4k
*/
-#define PSP_VERSTAGE_STACK_START 0x3B000
-#define PSP_VERSTAGE_STACK_SIZE 8K
+#define PSP_VERSTAGE_STACK_START 0x33000
+#define PSP_VERSTAGE_STACK_SIZE 40K

ENTRY(_psp_vs_start)
SECTIONS
diff --git a/src/soc/amd/picasso/psp_verstage/Makefile.inc b/src/soc/amd/picasso/psp_verstage/Makefile.inc
index 4f1642b..0986fd8 100644
--- a/src/soc/amd/picasso/psp_verstage/Makefile.inc
+++ b/src/soc/amd/picasso/psp_verstage/Makefile.inc
@@ -5,6 +5,9 @@
verstage-generic-ccopts += -D__USER_SPACE__
CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/2lib/include/

+# This size should match the size in the linker script.
+CFLAGS_arm += -Wstack-usage=40960
+
verstage-y += delay.c
verstage-y += fch.c
verstage-y += pmutil.c

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibca868ad7be639c2a0ca1c4ba6d71123d8b83c92
Gerrit-Change-Number: 46902
Gerrit-PatchSet: 3
Gerrit-Owner: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Julius Werner <jwerner@chromium.org>
Gerrit-Reviewer: Kangheui Won <khwon@chromium.org>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged