1 comment:
File Documentation/mainboard-blob-status.csv:
Patch Set #3, Line 21: sifive/hifive-unleashed,?,Sifive soc
Y afaik (ram training runs somewhere else, iirc)
Short answer: Y
Longer answer:
RAM init happens in coreboot. The boot ROM hasn't been fully reproduced from C code (see https://github.com/sifive/freedom-u540-c000-bootloader/pull/7), but source is available. and the boot ROM can be bypassed (see https://doc.coreboot.org/mainboard/sifive/hifive-unleashed.html#boot-modes), although I'm not sure if the current version of coreboot can run properly when the boot ROM didn't run first (the boot ROM handles CAR init if it runs).
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