Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13323
-gerrit
commit f51acb7963de86b1abcc1be92d0849511d3edb84 Author: Andrey Petrov andrey.petrov@intel.com Date: Tue Oct 27 22:08:03 2015 -0700
soc/apollolake: Handle romstage entry and call into C code
Parameter passing between bootblock and romstage is not implemented at this point. This patch only resets the stack pointer on romstage entry before calling into C code.
Change-Id: I7effcf3dcd78191a70c4d9caab56bee3d0a6d3ae Signed-off-by: Alexandru Gagniuc alexandrux.gagniuc@intel.com Signed-off-by: Andrey Petrov andrey.petrov@intel.com --- src/soc/intel/apollolake/Makefile.inc | 2 ++ src/soc/intel/apollolake/include/soc/romstage.h | 20 +++++++++++++++++ src/soc/intel/apollolake/romstage/entry.inc | 21 +++++++++++++++++ src/soc/intel/apollolake/romstage/romstage.c | 30 +++++++++++++++++++++++++ 4 files changed, 73 insertions(+)
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 4b0b31d..e57342a 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -15,9 +15,11 @@ bootblock-y += bootblock/early_chipset_config.S bootblock-y += mmap_boot.c bootblock-y += uart_early.c
+cpu_incs-y += $(src)/soc/intel/apollolake/romstage/entry.inc romstage-y += cpu.c romstage-y += gpio.c romstage-y += mmap_boot.c +romstage-y += romstage/romstage.c romstage-y += uart_early.c
ramstage-y += cpu.c diff --git a/src/soc/intel/apollolake/include/soc/romstage.h b/src/soc/intel/apollolake/include/soc/romstage.h new file mode 100644 index 0000000..f57f26d --- /dev/null +++ b/src/soc/intel/apollolake/include/soc/romstage.h @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Andrey Petrov andrey.petrov@intel.com for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _SOC_APOLLOLAKE_ROMSTAGE_H_ +#define _SOC_APOLLOLAKE_ROMSTAGE_H_ + +#include <arch/cpu.h> + +asmlinkage void romstage_entry(void); + +#endif /* _SOC_APOLLOLAKE_ROMSTAGE_H_ */ diff --git a/src/soc/intel/apollolake/romstage/entry.inc b/src/soc/intel/apollolake/romstage/entry.inc new file mode 100644 index 0000000..b04e17e --- /dev/null +++ b/src/soc/intel/apollolake/romstage/entry.inc @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Andrey Petrov andrey.petrov@intel.com for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +.intel_syntax noprefix +apollolake_entry: + + /* + * TODO: Make sure the stack does not clash with .car.data. + */ + mov esp, (CONFIG_DCACHE_RAM_BASE + 0x4000) + + call romstage_entry diff --git a/src/soc/intel/apollolake/romstage/romstage.c b/src/soc/intel/apollolake/romstage/romstage.c new file mode 100644 index 0000000..f76476b --- /dev/null +++ b/src/soc/intel/apollolake/romstage/romstage.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Alexandru Gagniuc alexandrux.gagniuc@intel.com for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <console/console.h> +#include <soc/romstage.h> +#include <soc/uart.h> + +asmlinkage void romstage_entry(void) +{ + /* Be careful. Bootblock might already have initialized the console */ + if (!IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { + lpss_console_uart_init(); + console_init(); + } + + printk(BIOS_DEBUG, "Starting romstage...\n"); + + /* This function must not return */ + while(1) + ; +}