build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38560 )
Change subject: Common code changes for skylake ......................................................................
Patch Set 1:
(40 comments)
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... File src/soc/intel/skylake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 265: uint32_t mask = 0; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 265: uint32_t mask = 0; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 271: m_cfg->MmioSize = 0x800; /* 2GB in MB */ code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 271: m_cfg->MmioSize = 0x800; /* 2GB in MB */ please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 272: m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 272: m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 273: m_cfg->IedSize = CONFIG_IED_REGION_SIZE; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 273: m_cfg->IedSize = CONFIG_IED_REGION_SIZE; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 274: m_cfg->ProbelessTrace = config->ProbelessTrace; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 274: m_cfg->ProbelessTrace = config->ProbelessTrace; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 275: m_cfg->SaGv = config->SaGv; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 275: m_cfg->SaGv = config->SaGv; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 276: m_cfg->UserBd = BOARD_TYPE_ULT_ULX; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 276: m_cfg->UserBd = BOARD_TYPE_ULT_ULX; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 277: m_cfg->RMT = config->Rmt; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 277: m_cfg->RMT = config->Rmt; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 278: m_cfg->CmdTriStateDis = config->CmdTriStateDis; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 278: m_cfg->CmdTriStateDis = config->CmdTriStateDis; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 279: m_cfg->DdrFreqLimit = config->DdrFreqLimit; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 279: m_cfg->DdrFreqLimit = config->DdrFreqLimit; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 280: m_cfg->VmxEnable = CONFIG(ENABLE_VMX); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 280: m_cfg->VmxEnable = CONFIG(ENABLE_VMX); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 281: m_cfg->PrmrrSize = get_prmrr_size(); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 281: m_cfg->PrmrrSize = get_prmrr_size(); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 282: for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) { code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 282: for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) { please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 283: if (config->PcieRpEnable[i]) code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 283: if (config->PcieRpEnable[i]) please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 284: mask |= (1<<i); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 284: mask |= (1<<i); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 285: } code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 285: } please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 288: cpu_flex_override(m_cfg); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 288: cpu_flex_override(m_cfg); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 290: /* HPET BDF already handled in coreboot code, so tell FSP to ignore UPDs */ code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 291: m_cfg->PchHpetBdfValid = 0; code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 291: m_cfg->PchHpetBdfValid = 0; please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 293: m_cfg->HyperThreading = CONFIG(FSP_HYPERTHREADING); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 293: m_cfg->HyperThreading = CONFIG(FSP_HYPERTHREADING); please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38560/1/src/soc/intel/skylake/romst... PS1, Line 294: trailing whitespace