coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: commonlib/dt: Fix incorrect cell properties
by Kapil Porwal (Code Review) 16 Jan '25

16 Jan '25

Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86030?usp=email ) Change subject: commonlib/dt: Fix incorrect cell properties ...................................................................... commonlib/dt: Fix incorrect cell properties The function "_dt_find_node" must update cell properties when the input path is NULL because the input node always points to the parent node i.e. the input node is pointing to the last node when the path is NULL. BUG=none TEST=Test coverage can pass. Change-Id: I1d360a4cc0a02462a53866bf375e5d4c85177a05 Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/commonlib/device_tree.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/86030/1 diff --git a/src/commonlib/device_tree.c b/src/commonlib/device_tree.c index a7007d9..bb3397a 100644 --- a/src/commonlib/device_tree.c +++ b/src/commonlib/device_tree.c @@ -1045,14 +1045,14 @@ { struct device_tree_node *node, *found = NULL; - if (!*path) - return parent; - /* Update #address-cells and #size-cells for the parent level (cells properties always count for the direct children of their node). */ if (addrcp || sizecp) dt_read_cell_props(parent, addrcp, sizecp); + if (!*path) + return parent; + /* Find the next node in the path, if it exists. */ list_for_each(node, parent->children, list_node) { if (!strcmp(node->name, *path)) { -- To view, visit https://review.coreboot.org/c/coreboot/+/86030?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1d360a4cc0a02462a53866bf375e5d4c85177a05 Gerrit-Change-Number: 86030 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com>

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[S] Change in coreboot[main]: Documentation: Fix wrong link to commit message guidelines
by Felix Singer (Code Review) 16 Jan '25

16 Jan '25

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add unmask eint event for bootblock
by Yidi Lin (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Chhao Chang, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84025?usp=email ) Change subject: soc/mediatek/mt8196: Add unmask eint event for bootblock ...................................................................... Patch Set 17: (3 comments) File src/soc/mediatek/common/eint_event.c: https://review.coreboot.org/c/coreboot/+/84025/comment/ad183f92_b88ad9a1?us… : PS17, Line 15: uintptr_t reg; > i<<2 is the offset of the next group of registers, not the base. […] My approach do the same way. https://review.coreboot.org/c/coreboot/+/84025/comment/d58719e8_398acb70?us… : PS17, Line 8: #define EVENT_CLEAN_MASK_OFFSET 0x880 : #define EVENT_MASK_OFFSET 0x800 : #define EINT_VALUE 0xFFFFFFFF : : void enable_eint_event(uintptr_t base, unsigned int port) : { : unsigned int i; : uintptr_t reg; : : for (i = 0; i < port; i++) { : reg = base + EVENT_CLEAN_MASK_OFFSET + (i << 2); : write32((uint32_t *)reg, EINT_VALUE); : } : } > Since EINT_BASE is already used in eint_event.h, an error will occur if it is not defined. That is why there should be eint_event_common.c. File src/soc/mediatek/common/include/soc/eint_event.h: https://review.coreboot.org/c/coreboot/+/84025/comment/7aabbec6_d1c435d9?us… : PS17, Line 17: struct eint_info { : uintptr_t base; : unsigned int eint_num; : }; > As long as it is a mobile phone IC, this structure is needed It has nothing to do with the type of IC. -- To view, visit https://review.coreboot.org/c/coreboot/+/84025?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4bf3820a89172186b8f51591f8760787affbb7a3 Gerrit-Change-Number: 84025 Gerrit-PatchSet: 17 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 07:30:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[S] Change in coreboot[main]: Documentation: Fix wrong link to commit message guidelines
by Felix Singer (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Martin L Roth, Werner Zeh. Felix Singer has posted comments on this change by Werner Zeh. ( https://review.coreboot.org/c/coreboot/+/85915?usp=email ) Change subject: Documentation: Fix wrong link to commit message guidelines ...................................................................... Patch Set 3: (1 comment) File Documentation/contributing/gerrit_guidelines.md: https://review.coreboot.org/c/coreboot/+/85915/comment/b55210c4_e70d9782?us… : PS1, Line 459: install the commit-msg hook Sorry for not replying earlier. > [...] it seems like .tex-files are not used to render our documentation, right? No, we don't use LaTeX for the documentation. We had support for building tex documents before, the coreboot "manual". AFAIR, it was just the same content written on the website but in a PDF using a book style. However, the configurations and build commands around it weren't maintained. So in order to clean up the build system for the documentation we removed it. Let's rework this thing later in order to get the patch in. -- To view, visit https://review.coreboot.org/c/coreboot/+/85915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1cd2b13da6fe59697d677c7350d73eda5d486544 Gerrit-Change-Number: 85915 Gerrit-PatchSet: 3 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 07:30:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com>

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[S] Change in coreboot[main]: drivers/option: Add CBFS file based option backend
by Subrata Banik (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Julius Werner, Jérémy Compostella, Nicholas Chin. Subrata Banik has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/85905?usp=email ) Change subject: drivers/option: Add CBFS file based option backend ...................................................................... Patch Set 14: (1 comment) Patchset: PS4: > > Acknowledged > > I'm not sure if the default enabling of the CBFS backend option for CrOS devices ended up breaking the builds for MTK devices. If so, it might be due to a shortage of verstage. > > https://qa.coreboot.org/job/coreboot-gerrit/271661/testReport/junit/(root)/… @jwerner@chromium.org please take a look. We won't be able to this Kconfig by default for all CrOS devices. -- To view, visit https://review.coreboot.org/c/coreboot/+/85905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc0439ee42f13f49ae54d4855d1d9333c39b01f5 Gerrit-Change-Number: 85905 Gerrit-PatchSet: 14 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 07:02:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/francka: Fix incorrect memory ram_id
by Subrata Banik (Code Review) 16 Jan '25

16 Jan '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86011?usp=email ) Change subject: mb/google/fatcat/var/francka: Fix incorrect memory ram_id ...................................................................... mb/google/fatcat/var/francka: Fix incorrect memory ram_id Fix ram_id index is always "0". Memory configuration board straps: GPIO_MEM_CONFIG_0 GPP_D08 GPIO_MEM_CONFIG_1 GPP_D07 BUG=b:372395010, b:381992696 TEST=emerge-fatcat coreboot Change-Id: I24ba06bc8d61ac5bd372ff4611d3ea876ac9bb92 Signed-off-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86011 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> --- M src/mainboard/google/fatcat/variants/francka/memory.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Dtrain Hsu: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/fatcat/variants/francka/memory.c b/src/mainboard/google/fatcat/variants/francka/memory.c index 74d74cd..c5b8165 100644 --- a/src/mainboard/google/fatcat/variants/francka/memory.c +++ b/src/mainboard/google/fatcat/variants/francka/memory.c @@ -89,5 +89,5 @@ void variant_get_spd_info(struct mem_spd *spd_info) { spd_info->topo = MEM_TOPO_MEMORY_DOWN; - spd_info->cbfs_index = 0; + spd_info->cbfs_index = variant_memory_sku(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/86011?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24ba06bc8d61ac5bd372ff4611d3ea876ac9bb92 Gerrit-Change-Number: 86011 Gerrit-PatchSet: 3 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/francka: Fix incorrect memory ram_id
by Dtrain Hsu (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Ian Feng, Pranava Y N. Dtrain Hsu has posted comments on this change by Ian Feng. ( https://review.coreboot.org/c/coreboot/+/86011?usp=email ) Change subject: mb/google/fatcat/var/francka: Fix incorrect memory ram_id ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86011?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24ba06bc8d61ac5bd372ff4611d3ea876ac9bb92 Gerrit-Change-Number: 86011 Gerrit-PatchSet: 2 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 06:57:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek: Introduce mtk_edp_enable() to fix eDP init flow
by Yidi Lin (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86028?usp=email ) Change subject: soc/mediatek: Introduce mtk_edp_enable() to fix eDP init flow ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/common/display.c: https://review.coreboot.org/c/coreboot/+/86028/comment/e4fcbb8d_d4ff05d1?us… : PS3, Line 40: __weak int mtk_edp_init(struct mtk_dp *mtk_dp, struct edid *edid); > > `Using weak declarations can have unintended link defects` […] Remove `;` -- To view, visit https://review.coreboot.org/c/coreboot/+/86028?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief847320caca1af1c6deb242dc224e7698a6603c Gerrit-Change-Number: 86028 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 06:44:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add unmask eint event for bootblock
by Chhao Chang (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Jarried Lin, Yidi Lin, Yu-Ping Wu. Chhao Chang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84025?usp=email ) Change subject: soc/mediatek/mt8196: Add unmask eint event for bootblock ...................................................................... Patch Set 17: (3 comments) File src/soc/mediatek/common/eint_event.c: https://review.coreboot.org/c/coreboot/+/84025/comment/3a222835_22f339dd?us… : PS17, Line 15: uintptr_t reg; > What is your concern ? i<<2 is the offset of the next group of registers, not the base. If you change it like this, it will change the semantics of i. For example: base 1000b000 → next group 1000b004 https://review.coreboot.org/c/coreboot/+/84025/comment/2a031081_6370e03e?us… : PS17, Line 8: #define EVENT_CLEAN_MASK_OFFSET 0x880 : #define EVENT_MASK_OFFSET 0x800 : #define EINT_VALUE 0xFFFFFFFF : : void enable_eint_event(uintptr_t base, unsigned int port) : { : unsigned int i; : uintptr_t reg; : : for (i = 0; i < port; i++) { : reg = base + EVENT_CLEAN_MASK_OFFSET + (i << 2); : write32((uint32_t *)reg, EINT_VALUE); : } : } > It is not necessary to define a unused `EINT_BASE` for mt8196. Since EINT_BASE is already used in eint_event.h, an error will occur if it is not defined. File src/soc/mediatek/common/include/soc/eint_event.h: https://review.coreboot.org/c/coreboot/+/84025/comment/131a3684_8adeefc4?us… : PS17, Line 17: struct eint_info { : uintptr_t base; : unsigned int eint_num; : }; > Only MT8196 needs this struct. As long as it is a mobile phone IC, this structure is needed -- To view, visit https://review.coreboot.org/c/coreboot/+/84025?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4bf3820a89172186b8f51591f8760787affbb7a3 Gerrit-Change-Number: 84025 Gerrit-PatchSet: 17 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 06:26:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC driver
by Yidi Lin (Code Review) 16 Jan '25

16 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85978?usp=email ) Change subject: soc/mediatek/mt8196: Add RTC driver ...................................................................... Patch Set 2: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85978/comment/f6a8ead7_eb2730f3?us… : PS1, Line 9: rtc > will update keep comment unresolved File src/soc/mediatek/mt8196/include/soc/mt6685_rtc_hw.h: PS1: > will update is next version, as discussion in meeting, first update a version for the previous 56 c […] keep comment unresolved File src/soc/mediatek/mt8196/mt6685_rtc.c: https://review.coreboot.org/c/coreboot/+/85978/comment/d89f805d_57f33bae?us… : PS1, Line 68: RG_BANK_FQMTR_RST_SHIFT); > Acknowledged keep comment unresolved https://review.coreboot.org/c/coreboot/+/85978/comment/078aa1ca_3b41b929?us… : PS1, Line 233: rtc_read(RTC_AL_SEC, &rdata); : : rtc_write(RTC_AL_SEC, (rdata & (~RTC_LPD_OPT_MASK)) | RTC_LPD_OPT_EOSC_LPD); : if (!rtc_write_trigger()) > will update keep comment unresolved File src/soc/mediatek/mt8196/mt6685_rtc.c: https://review.coreboot.org/c/coreboot/+/85978/comment/4cbd9d2f_5d0b86a5?us… : PS2, Line 193: RTC_CON_GPU align https://review.coreboot.org/c/coreboot/+/85978/comment/b834dcaa_fdecadee?us… : PS2, Line 358: rtc_init_after_recovery align or move to above line -- To view, visit https://review.coreboot.org/c/coreboot/+/85978?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3dd337eaa3eed3012ddea300f7e04f2b63fb2daa Gerrit-Change-Number: 85978 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shunxi Zhang <ot_shunxi.zhang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 06:18:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shunxi Zhang <ot_shunxi.zhang(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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coreboot-gerrit January 2025