coreboot-gerrit October 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/alderlake: Hook up PCIe Power Management to option API
by Sean Rhodes (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Angel Pons, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81906?usp=email ) Change subject: soc/intel/alderlake: Hook up PCIe Power Management to option API ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81906/comment/7c502b97_089ad383?us… : PS10, Line 10: option API. > Ideally, you would want to have per-port options. […] For us, at least, people wanted it as a "make sure no power saving stuff is making me lose 0.00001% performance", so the "all" option is actually what we're after. Maybe when CFR gets merged, generating them automatically with an "all" option would be the solution? -- To view, visit https://review.coreboot.org/c/coreboot/+/81906?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2b06a7c734a4fd4073e86c668742ee35e1d79956 Gerrit-Change-Number: 81906 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Oct 2024 16:03:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: mb/starlabs/starlite_adl: Make the memory speed configurable
by Sean Rhodes (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84635?usp=email ) Change subject: mb/starlabs/starlite_adl: Make the memory speed configurable ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > based on Gerrit showing this change as renaming the existing SPD file to the -7500 variant, it would […] Saves about 0.5W, multi-core score down 150 odd -- To view, visit https://review.coreboot.org/c/coreboot/+/84635?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie77d3be122478d5e674f92f8085930ae38ff2de1 Gerrit-Change-Number: 84635 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Oct 2024 15:53:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: mb/starlabs/starlite_adl: Make the memory speed configurable
by Matt DeVillier (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84635?usp=email ) Change subject: mb/starlabs/starlite_adl: Make the memory speed configurable ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: based on Gerrit showing this change as renaming the existing SPD file to the -7500 variant, it would seem that you were using the fastest timings already, and this change has the effect of changing the default down to -5500. What's the expected performance/power change? -- To view, visit https://review.coreboot.org/c/coreboot/+/84635?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie77d3be122478d5e674f92f8085930ae38ff2de1 Gerrit-Change-Number: 84635 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 02 Oct 2024 15:05:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/starlabs/starlite_adl: Make the memory speed configurable
by Sean Rhodes (Code Review) 02 Oct '24

02 Oct '24

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84635?usp=email ) Change subject: mb/starlabs/starlite_adl: Make the memory speed configurable ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/84635?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie77d3be122478d5e674f92f8085930ae38ff2de1 Gerrit-Change-Number: 84635 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:58:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/starlabs/starbook: Move MAINBOARD_HAS_TPM2 selection
by Matt DeVillier (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84267?usp=email ) Change subject: mb/starlabs/starbook: Move MAINBOARD_HAS_TPM2 selection ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84267?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02b5b0912afbd7c4634c208bb17db16d0ac7ba99 Gerrit-Change-Number: 84267 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:53:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/byra/var/kinox: Add/update VBT files
by Matt DeVillier (Code Review) 02 Oct '24

02 Oct '24

Matt DeVillier has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/83996?usp=email ) Change subject: mb/google/byra/var/kinox: Add/update VBT files ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > > there was a discussion on this a while back, and the determination was that given the VBTs were si […] I don't feel strongly about where they live, just that they are included. Would be nice if that solution helped simplify things downstream for Google as well, so that they could directly contribute the VBTs rather than me having to add them after the fact. -- To view, visit https://review.coreboot.org/c/coreboot/+/83996?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01c19222628fee3874ef592ec40b40d9bd679dce Gerrit-Change-Number: 83996 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:49:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: drivers/usb/acpi: Add AOLD Method for Intel Bluetooth
by Matt DeVillier (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Sean Rhodes, Subrata Banik, Tarun. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84134?usp=email ) Change subject: drivers/usb/acpi: Add AOLD Method for Intel Bluetooth ...................................................................... Patch Set 22: (1 comment) File src/drivers/usb/acpi/usb_acpi.c: https://review.coreboot.org/c/coreboot/+/84134/comment/b231165d_0afc0840?us… : PS22, Line 247: Zero // Audio Offload Enabled assume is this 0 = disabled, 1 = enabled? -- To view, visit https://review.coreboot.org/c/coreboot/+/84134?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb804fb1cf0edef4a98479a6261ca68255dbf075 Gerrit-Change-Number: 84134 Gerrit-PatchSet: 22 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:46:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/byra/var/kinox: Add/update VBT files
by Subrata Banik (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Matt DeVillier. Subrata Banik has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/83996?usp=email ) Change subject: mb/google/byra/var/kinox: Add/update VBT files ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > there was a discussion on this a while back, and the determination was that given the VBTs were simply binary packed data, non-executable, and easily read by many OSS utils, that there was no issue including them in coreboot. Additionally, a large number of devices would not have functional display init without them. I agree with you and I will bring this topic with Intel FSP team during my sync call. Just giving a heads up here. may be submodules are a good way to put those blobs? -- To view, visit https://review.coreboot.org/c/coreboot/+/83996?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01c19222628fee3874ef592ec40b40d9bd679dce Gerrit-Change-Number: 83996 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:36:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/byra/var/kinox: Add/update VBT files
by Matt DeVillier (Code Review) 02 Oct '24

02 Oct '24

Matt DeVillier has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/83996?usp=email ) Change subject: mb/google/byra/var/kinox: Add/update VBT files ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Hi @matt.devillier@gmail.com, […] there was a discussion on this a while back, and the determination was that given the VBTs were simply binary packed data, non-executable, and easily read by many OSS utils, that there was no issue including them in coreboot. Additionally, a large number of devices would not have functional display init without them. -- To view, visit https://review.coreboot.org/c/coreboot/+/83996?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01c19222628fee3874ef592ec40b40d9bd679dce Gerrit-Change-Number: 83996 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:34:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: soc/intel/alderlake: Hook up PCIe Power Management to option API
by Angel Pons (Code Review) 02 Oct '24

02 Oct '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Sean Rhodes, Subrata Banik. Angel Pons has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81906?usp=email ) Change subject: soc/intel/alderlake: Hook up PCIe Power Management to option API ...................................................................... Patch Set 10: Code-Review+2 (2 comments) Patchset: PS10: Technically you Commit Message: https://review.coreboot.org/c/coreboot/+/81906/comment/c4efe55c_99aa3213?us… : PS10, Line 10: option API. Ideally, you would want to have per-port options. But I understand that this is not practical given how limited CMOS space is. I would prefer to add a note here describing this limitation. Alternatively, if you have the root port number, you could complicate things and use `sprintf()` to append the root port number (also differentiate between CPU and PCH RPs). Then, you can just define the options you care about in the CMOS layout (e.g. in-use RPs of a mainboard). -- To view, visit https://review.coreboot.org/c/coreboot/+/81906?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2b06a7c734a4fd4073e86c668742ee35e1d79956 Gerrit-Change-Number: 81906 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 02 Oct 2024 14:31:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit October 2024