coreboot-gerrit July 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[master]: intelblocks/cpu/mp_init: Add missing ADL-S SKUs to CPU match table
by Michał Żygowski (Code Review) 03 Jul '23

03 Jul '23

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76204?usp=email ) Change subject: intelblocks/cpu/mp_init: Add missing ADL-S SKUs to CPU match table ...................................................................... intelblocks/cpu/mp_init: Add missing ADL-S SKUs to CPU match table Only A step ADL-S CPUs were added to CPU table for MP init. Add the remaining ADL-S CPUs to the table. TEST=Boot MSI PRO Z690-A with C step i5-12600K and observe coreboot no longer uses generic CPU ops. Change-Id: I3692a3f089ca23af860bd1c8e3c29fee9d9234c9 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/soc/intel/common/block/cpu/mp_init.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/76204/1 diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 918795a..4f8ea05 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -75,6 +75,11 @@ { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_G0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_H0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_L0, CPUID_EXACT_MATCH_MASK }, -- To view, visit https://review.coreboot.org/c/coreboot/+/76204?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3692a3f089ca23af860bd1c8e3c29fee9d9234c9 Gerrit-Change-Number: 76204 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel: Drop the suffixes from ADL and RPL CPUID macros
by Michał Żygowski (Code Review) 03 Jul '23

03 Jul '23

Attention is currently required from: Subrata Banik, Tarun Tuli. Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76203?usp=email ) Change subject: soc/intel: Drop the suffixes from ADL and RPL CPUID macros ...................................................................... soc/intel: Drop the suffixes from ADL and RPL CPUID macros CPUID is the same for Alder Lake and Raptor Lake S and HX variants. To reduce the confusion and concerns how to name the macros, remove the suffixes. Thankfully the stepping names are unique across mobile (P suffixed) and desktop (S and HX suffixed) SKUs. Distinguishing the S from HX is possible via host bridge PCI ID. Change-Id: Ib08fb0923481541dd6f358cf60da44d90bd75ae2 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/include/cpu/intel/cpu_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/cpu/mp_init.c 3 files changed, 22 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/76203/1 diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 4501c1a..1fa6780 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -58,11 +58,11 @@ #define CPUID_SAPPHIRERAPIDS_SP_Ex 0x806f8 #define CPUID_ELKHARTLAKE_A0 0x90660 #define CPUID_ELKHARTLAKE_B0 0x90661 -#define CPUID_ALDERLAKE_S_A0 0x90670 -#define CPUID_ALDERLAKE_S_B0 0x90671 -#define CPUID_ALDERLAKE_S_C0 0x90672 -#define CPUID_ALDERLAKE_S_G0 0x90674 -#define CPUID_ALDERLAKE_S_H0 0x90675 +#define CPUID_ALDERLAKE_A0 0x90670 +#define CPUID_ALDERLAKE_B0 0x90671 +#define CPUID_ALDERLAKE_C0 0x90672 +#define CPUID_ALDERLAKE_G0 0x90674 +#define CPUID_ALDERLAKE_H0 0x90675 #define CPUID_ALDERLAKE_J0 0x906a0 #define CPUID_ALDERLAKE_Q0 0x906a1 #define CPUID_ALDERLAKE_K0 0x906a2 @@ -73,11 +73,11 @@ #define CPUID_METEORLAKE_A0_2 0xa06a1 #define CPUID_METEORLAKE_B0 0xa06a2 #define CPUID_METEORLAKE_C0 0xa06a4 -#define CPUID_RAPTORLAKE_S_A0 0xb0670 -#define CPUID_RAPTORLAKE_S_B0 0xb0671 -#define CPUID_RAPTORLAKE_S_C0_1 0xb0672 -#define CPUID_RAPTORLAKE_S_C0_2 0xb0675 -#define CPUID_RAPTORLAKE_P_J0 0xb06a2 -#define CPUID_RAPTORLAKE_P_Q0 0xb06a3 +#define CPUID_RAPTORLAKE_A0 0xb0670 +#define CPUID_RAPTORLAKE_B0 0xb0671 +#define CPUID_RAPTORLAKE_C0_1 0xb0672 +#define CPUID_RAPTORLAKE_C0_2 0xb0675 +#define CPUID_RAPTORLAKE_J0 0xb06a2 +#define CPUID_RAPTORLAKE_Q0 0xb06a3 #endif /* CPU_INTEL_CPU_IDS_H */ diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index f118a89..2942547 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -34,10 +34,10 @@ { CPUID_ALDERLAKE_S_C0, "Alderlake-S C0 Platform" }, { CPUID_ALDERLAKE_S_G0, "Alderlake-S G0 Platform" }, { CPUID_ALDERLAKE_S_H0, "Alderlake-S H0 Platform" }, - { CPUID_RAPTORLAKE_S_A0, "Raptorlake-S A0 Platform" }, - { CPUID_RAPTORLAKE_S_B0, "Raptorlake-S B0 Platform" }, - { CPUID_RAPTORLAKE_P_J0, "Raptorlake-P J0 Platform" }, - { CPUID_RAPTORLAKE_P_Q0, "Raptorlake-P Q0 Platform" }, + { CPUID_RAPTORLAKE_A0, "Raptorlake-S A0 Platform" }, + { CPUID_RAPTORLAKE_B0, "Raptorlake-S B0 Platform" }, + { CPUID_RAPTORLAKE_J0, "Raptorlake-P J0 Platform" }, + { CPUID_RAPTORLAKE_Q0, "Raptorlake-P Q0 Platform" }, }; static struct { diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 8f3ffc2..918795a 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -74,19 +74,19 @@ { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_L0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_J0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_Q0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_A0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_B0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_C0_1, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_C0_2, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_J0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_Q0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_C0_1, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_C0_2, CPUID_EXACT_MATCH_MASK }, CPU_TABLE_END }; -- To view, visit https://review.coreboot.org/c/coreboot/+/76203?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib08fb0923481541dd6f358cf60da44d90bd75ae2 Gerrit-Change-Number: 76203 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel: Replace number in RPL-S ESPI PCI IDs by chipset name
by Michał Żygowski (Code Review) 03 Jul '23

03 Jul '23

Attention is currently required from: Michał Żygowski, Paul Menzel, Subrata Banik, Tarun Tuli. Hello Paul Menzel, Subrata Banik, Tarun Tuli, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76192?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: soc/intel: Replace number in RPL-S ESPI PCI IDs by chipset name ...................................................................... soc/intel: Replace number in RPL-S ESPI PCI IDs by chipset name Change-Id: I68416e1633c3d67070790a9db2cd9a13a8981042 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/lpc/lpc.c 3 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/76192/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76192?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68416e1633c3d67070790a9db2cd9a13a8981042 Gerrit-Change-Number: 76192 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: mb/siemens/mc_ehl3/devicetree.cb: Disable USB 3.0 port 0
by 9elements QA (Code Review) 03 Jul '23

03 Jul '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75836?usp=email ) Change subject: mb/siemens/mc_ehl3/devicetree.cb: Disable USB 3.0 port 0 ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 8 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171466 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171464 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/171463 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/171462 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/171461 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171460 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/171459 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/171458 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/171457 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/171456 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/171455 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/171454 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171453 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/171452 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/171451 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/171450 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/75836?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28465f1c5e6d3167c649da898ec60d8bb97093e2 Gerrit-Change-Number: 75836 Gerrit-PatchSet: 3 Gerrit-Owner: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Mon, 03 Jul 2023 15:27:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: configs/config.raptor-cs-talos-2: add config for Talos II
by Sergii Dmytruk (Code Review) 03 Jul '23

03 Jul '23

Attention is currently required from: Paul Menzel. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67070?usp=email ) Change subject: configs/config.raptor-cs-talos-2: add config for Talos II ...................................................................... Patch Set 15: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/67070/comment/e28a56b0_d4b1de48 : PS14, Line 7: Talos-II > It’s spelled without a hyphen, isn’t it: Talos II [1]? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/67070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49ad6094acaccf731ab6d6b45ac103d485a3179c Gerrit-Change-Number: 67070 Gerrit-PatchSet: 15 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 03 Jul 2023 15:12:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: configs/config.raptor-cs-talos-2: add config for Talos II
by Sergii Dmytruk (Code Review) 03 Jul '23

03 Jul '23

Attention is currently required from: Sergii Dmytruk. Hello Igor Bagnucki, Krystian Hebel, Michał Żygowski, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67070?usp=email to look at the new patch set (#15). Change subject: configs/config.raptor-cs-talos-2: add config for Talos II ...................................................................... configs/config.raptor-cs-talos-2: add config for Talos II Signed-off-by: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Change-Id: I49ad6094acaccf731ab6d6b45ac103d485a3179c --- A configs/config.raptor-cs-talos-2 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/67070/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/67070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49ad6094acaccf731ab6d6b45ac103d485a3179c Gerrit-Change-Number: 67070 Gerrit-PatchSet: 15 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: mb/google/nissa/var/joxer: support for different WiFi SAR tables
by 9elements QA (Code Review) 03 Jul '23

03 Jul '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76144?usp=email ) Change subject: mb/google/nissa/var/joxer: support for different WiFi SAR tables ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 8 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171449 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171447 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/171446 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/171445 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/171444 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171443 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/171442 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/171441 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/171440 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/171439 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/171438 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/171437 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171436 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/171435 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/171434 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/171433 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/76144?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibea62c77ecad9b2c475452b706779e4cfc6b06d4 Gerrit-Change-Number: 76144 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Mon, 03 Jul 2023 15:05:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/siemens/mc_apl1: Fix wrong register masking
by 9elements QA (Code Review) 03 Jul '23

03 Jul '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76177?usp=email ) Change subject: mb/siemens/mc_apl1: Fix wrong register masking ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 8 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171432 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171430 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/171429 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/171428 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/171427 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171426 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/171425 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/171424 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/171423 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/171422 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/171421 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/171420 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171419 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/171418 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/171417 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/171416 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/76177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd6e70dcb42c69cf3bc5d36db993e6def52eba58 Gerrit-Change-Number: 76177 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Mon, 03 Jul 2023 14:43:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: amdfwtool: Allow bios table source addresses to select base
by Fred Reitberger (Code Review) 03 Jul '23

03 Jul '23

Attention is currently required from: Bao Zheng, Felix Held, Martin L Roth. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76163?usp=email ) Change subject: amdfwtool: Allow bios table source addresses to select base ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > shouldn't this be done for all src, dest and size parameters to be consistent? I'll look into that for another patch series - this was to just get APOB working with as few changes as possible. With the use of the `get_fmap_vaule` macro, I was able to get `shell printf "%#x"` working inline, so this patch is no longer necessary. -- To view, visit https://review.coreboot.org/c/coreboot/+/76163?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45474600048a33ad186ba4d1baed7b5891ffdefe Gerrit-Change-Number: 76163 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Jul 2023 14:35:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/phoenix/Makefile.inc: Refactor repeated lines to a variable
by Fred Reitberger (Code Review) 03 Jul '23

03 Jul '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Hello Felix Held, Jason Glenesk, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76197?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: soc/amd/phoenix/Makefile.inc: Refactor repeated lines to a variable ...................................................................... soc/amd/phoenix/Makefile.inc: Refactor repeated lines to a variable Rather than repeat the same line multiple times, save it in a variable once and use that variable in the rest of the file. TEST=timeless birman build identical Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I4eb262adb3bbda04add79b2e2b8bee9a609a1e5b --- M src/soc/amd/phoenix/Makefile.inc 1 file changed, 7 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/76197/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/76197?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4eb262adb3bbda04add79b2e2b8bee9a609a1e5b Gerrit-Change-Number: 76197 Gerrit-PatchSet: 3 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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