coreboot-gerrit July 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[master]: mb/google/rex/var/screebo: Double data hold time to 100 ns for touchs...
by Subrata Banik (Code Review) 04 Jul '23

04 Jul '23

Attention is currently required from: Jakub Czapiga, Tarun Tuli, zhongtian wu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76190?usp=email ) Change subject: mb/google/rex/var/screebo: Double data hold time to 100 ns for touchscreen test failure ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76190?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30e7c87d788f7f144276c45e8475af65f1f132ae Gerrit-Change-Number: 76190 Gerrit-PatchSet: 3 Gerrit-Owner: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:50:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex/var/screebo:Fix touchpad timing
by Subrata Banik (Code Review) 04 Jul '23

04 Jul '23

Attention is currently required from: Eric Lai, Jakub Czapiga, Tarun Tuli, zhongtian wu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76169?usp=email ) Change subject: mb/google/rex/var/screebo:Fix touchpad timing ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76169?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b2d958a5a0d41e2cfa1087f5cb94cc83bbb1739 Gerrit-Change-Number: 76169 Gerrit-PatchSet: 4 Gerrit-Owner: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:49:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: Revert "soc/intel/meteorlake: Add support for crashlog"
by Subrata Banik (Code Review) 04 Jul '23

04 Jul '23

Attention is currently required from: Kapil Porwal, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76228?usp=email ) Change subject: Revert "soc/intel/meteorlake: Add support for crashlog" ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: do we need to revert this CL? -- To view, visit https://review.coreboot.org/c/coreboot/+/76228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9b073da5b80239d47348a3f9b4696a7b10b7ea6 Gerrit-Change-Number: 76228 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:46:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "soc/intel/common: Print crashlog size info in hex"
by Subrata Banik (Code Review) 04 Jul '23

04 Jul '23

Attention is currently required from: Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76227?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: Revert "soc/intel/common: Print crashlog size info in hex" ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: do we need to revert this CL? -- To view, visit https://review.coreboot.org/c/coreboot/+/76227?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf3c0e631a20595056cce768d1a62ddc3bc2b809 Gerrit-Change-Number: 76227 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:46:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: acpi/acpi.c: Move ACPI header creation to a function
by 9elements QA (Code Review) 04 Jul '23

04 Jul '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76143?usp=email ) Change subject: acpi/acpi.c: Move ACPI header creation to a function ...................................................................... Patch Set 4: Automatic boot test returned (PASS/FAIL/TOTAL): 7 / 7 / 14 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171775 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171773 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/171772 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/171771 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171769 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/171767 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/171766 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/171765 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/171764 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/171763 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/171762 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/171761 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/171760 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/171759 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/76143?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id2e54d61970294e028a61ba86c07c5482784e307 Gerrit-Change-Number: 76143 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:37:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/inventec: Add Intel SPR server board Inventec Transformers
by David Hendricks (Code Review) 04 Jul '23

04 Jul '23

Attention is currently required from: Angel Pons, Annie Chen, Arthur Heymans, Felix Singer, Hung-Wei Chen, Jonathan Zhang, Lean Sheng Tan, Paul Menzel. David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75598?usp=email ) Change subject: mb/inventec: Add Intel SPR server board Inventec Transformers ...................................................................... Patch Set 10: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75598/comment/0f494bcb_15ccf712 : PS9, Line 23: The board boots to Linux 4.19.6 with all 192 cores available. > @Paul Menzel […] @Paul - I don't think we should bloat commit messages with dmesg output. If you feel it's useful and/or should be required, then please send a patch to document it somewhere. Patchset: PS5: > I'm sorry for coming back to this late. […] Regarding OCP, it's a bit of a confusing situation. OCP is not involved in the production of the mainboards. AIUI their purpose is more about promoting interoperability such as with form factor and power supplies as well as opening up collateral such as documentation (e.g. schematics), making firmware buildable, etc. This feeds back into products such as coreboot and OpenBMC just as with any other vendor's requirements and contributions. You were correct to point out the duplication here, and it's fine to kick off a big discussion :-) Mainboard variants are a topic that comes up once in a while, so it's a good outcome to improve our documentation about when/how to use them and if there are other ways to avoid duplication and reduce maintenance burden. That's one of the big strengths coreboot has over other firmware implementations (especially for x86), after all. All that said, thanks for taking the time to look this patch over and let's keep moving things in a positive direction. -- To view, visit https://review.coreboot.org/c/coreboot/+/75598?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Gerrit-Change-Number: 75598 Gerrit-PatchSet: 10 Gerrit-Owner: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Hung-Wei Chen <Chen.HW(a)inventec.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Hendricks Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Hung-Wei Chen <Chen.HW(a)inventec.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:25:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Comment-In-Reply-To: Annie Chen <chen.annieet(a)inventec.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/uldren: Update DPTF parameters and tcc_offset
by Eric Lai (Code Review) 04 Jul '23

04 Jul '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76105?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/uldren: Update DPTF parameters and tcc_offset ...................................................................... mb/google/nissa/var/uldren: Update DPTF parameters and tcc_offset Follow the Project_Uldren_Thermal_paramters_list_2023_0626.xlsx to modify DPTF parameters and tcc_offset. - Set tcc_offset to 3. - Update Critical Policy trip point. - Update Power Limits PL1 minimum step size to control limits (in mW). BUG=b:282598257 BRANCH=firmware-nissa-15217.B TEST=boot uldren to ChromeOS and pass thermal test. Change-Id: Ic5bbb3aa3b036a1eae8a95f63b570db2dc6da978 Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76105 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Yang <paul.f.yang(a)intel.corp-partner.google.com> Reviewed-by: Ivan Chen <yulunchen(a)google.com> Reviewed-by: Derek Huang <derekhuang(a)google.com> --- M src/mainboard/google/brya/variants/uldren/overridetree.cb 1 file changed, 7 insertions(+), 5 deletions(-) Approvals: Ivan Chen: Looks good to me, but someone else must approve Derek Huang: Looks good to me, but someone else must approve Sumeet R Pawnikar: Looks good to me, approved build bot (Jenkins): Verified Paul Yang: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/uldren/overridetree.cb b/src/mainboard/google/brya/variants/uldren/overridetree.cb index a873a62..973a6de 100644 --- a/src/mainboard/google/brya/variants/uldren/overridetree.cb +++ b/src/mainboard/google/brya/variants/uldren/overridetree.cb @@ -106,6 +106,8 @@ .vnn_icc_max_ma = 500, }" + register "tcc_offset" = "3" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | @@ -175,10 +177,10 @@ }" ## Critical Policy register "policies.critical" = "{ - [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 98, SHUTDOWN), - [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 98, SHUTDOWN), - [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 98, SHUTDOWN), + [0] = DPTF_CRITICAL(CPU, 130, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 105, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 105, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 105, SHUTDOWN), }" register "controls.power_limits" = "{ @@ -187,7 +189,7 @@ .max_power = 6000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC, - .granularity = 250 + .granularity = 125 }, .pl2 = { .min_power = 25000, -- To view, visit https://review.coreboot.org/c/coreboot/+/76105?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5bbb3aa3b036a1eae8a95f63b570db2dc6da978 Gerrit-Change-Number: 76105 Gerrit-PatchSet: 3 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Paul Yang <paul.f.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/nissa/var/joxer: Disable external fivr
by Eric Lai (Code Review) 04 Jul '23

04 Jul '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76187?usp=email ) Change subject: mb/google/nissa/var/joxer: Disable external fivr ...................................................................... mb/google/nissa/var/joxer: Disable external fivr In next phase, joxer will remove external fivr. BUG=b:285477026 TEST=emerge-nissa coreboot and boot to OS, suspend/resume work normally. Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I7fd7ad90e1544966170df402243604379f5790db Reviewed-on: https://review.coreboot.org/c/coreboot/+/76187 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Derek Huang <derekhuang(a)google.com> --- M src/mainboard/google/brya/variants/joxer/overridetree.cb 1 file changed, 0 insertions(+), 10 deletions(-) Approvals: Eric Lai: Looks good to me, approved Derek Huang: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index 8ec3b21..bab93f6 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -22,16 +22,6 @@ # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, - .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, - .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, - .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, - .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, - .v1p05_voltage_mv = 1050, - .vnn_voltage_mv = 780, - .vnn_sx_voltage_mv = 1050, - .v1p05_icc_max_ma = 500, - .vnn_icc_max_ma = 500, }" # Intel Common SoC Config -- To view, visit https://review.coreboot.org/c/coreboot/+/76187?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fd7ad90e1544966170df402243604379f5790db Gerrit-Change-Number: 76187 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: soc/amd/common/block/uart: remove DRIVERS_UART_8250MEM
by Eric Lai (Code Review) 04 Jul '23

04 Jul '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76184?usp=email ) Change subject: soc/amd/common/block/uart: remove DRIVERS_UART_8250MEM ...................................................................... soc/amd/common/block/uart: remove DRIVERS_UART_8250MEM Select DRIVERS_UART_8250MEM_32 will select DRIVERS_UART_8250MEM too. Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Change-Id: I87a47e2d76ab7a0717edf725bf94d87f9f2357f1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76184 Reviewed-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/soc/amd/common/block/uart/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Nico Huber: Looks good to me, but someone else must approve Ivy Jian: Looks good to me, approved diff --git a/src/soc/amd/common/block/uart/Kconfig b/src/soc/amd/common/block/uart/Kconfig index 438fde0..4480043 100644 --- a/src/soc/amd/common/block/uart/Kconfig +++ b/src/soc/amd/common/block/uart/Kconfig @@ -8,7 +8,6 @@ config AMD_SOC_CONSOLE_UART bool "Use integrated AMD SoC UART controller for console" - select DRIVERS_UART_8250MEM select DRIVERS_UART_8250MEM_32 select NO_UART_ON_SUPERIO select UART_OVERRIDE_REFCLK -- To view, visit https://review.coreboot.org/c/coreboot/+/76184?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87a47e2d76ab7a0717edf725bf94d87f9f2357f1 Gerrit-Change-Number: 76184 Gerrit-PatchSet: 3 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google: AMD: move tpm_tis to AMD common code
by Eric Lai (Code Review) 04 Jul '23

04 Jul '23

Attention is currently required from: Felix Held, Fred Reitberger, Grzegorz Bernacki, Jason Glenesk, Jason Nien, Jon Murphy, Martin L Roth, Martin Roth, Matt DeVillier, Paul Menzel, Raul Rangel, Yu-Ping Wu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75621?usp=email ) Change subject: mb/google: AMD: move tpm_tis to AMD common code ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75621?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I775c4e24cffee99b6ac3e05b58a75425029a86c8 Gerrit-Change-Number: 75621 Gerrit-PatchSet: 4 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Jul 2023 00:12:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit July 2023