coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[master]: util/sconfig: Remove lapic devices from devicetree parsers
by Arthur Heymans (Code Review) 06 Feb '23

06 Feb '23

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69378 ) Change subject: util/sconfig: Remove lapic devices from devicetree parsers ...................................................................... Patch Set 12: (1 comment) Patchset: PS12: > This one breaks Craterlake. I had to revert it locally otherwise it boots so slowly (at systemd execution), that I had to stop the booting. Once reverted, it boots to OS quickly as expected. CB:72604 fixes that. -- To view, visit https://review.coreboot.org/c/coreboot/+/69378 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0746eb808a2956ac75f76c8189a9ecf190e33ce9 Gerrit-Change-Number: 69378 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:10:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya/var/skolas: update dptf thermal settings
by Sumeet R Pawnikar (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Bora Guvendik, Subrata Banik, Jérémy Compostella, Nick Vaccaro, AlanKY Lee. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71692 ) Change subject: mb/google/brya/var/skolas: update dptf thermal settings ...................................................................... Patch Set 5: (2 comments) Patchset: PS2: > Hi Sumeet, […] Hi Alan, If you have verified and tested these changes, please give your comment as +1/+2 for this patch to get merge asap. Thanks. Patchset: PS5: > Sumeet please push the Brya0 patches also, we try to keep skolas/Brya0 at the same level. […] First, let me check and evaluate these changes for Brya0 and push it later. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/71692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibeddce61b0d73d82a85f486e7cb5cbfa9568953c Gerrit-Change-Number: 71692 Gerrit-PatchSet: 5 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Vidya Gopalakrishnan <vidya.gopalakrishnan(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:10:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Comment-In-Reply-To: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/apl: Hook up cpu ops in devicetree
by Arthur Heymans (Code Review) 06 Feb '23

06 Feb '23

Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72705 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/apl: Hook up cpu ops in devicetree ...................................................................... soc/intel/apl: Hook up cpu ops in devicetree This simplifies the code flow of the cpu init. APL can do CPU init after calling FSP-S, while GLK needs to do that before. This is now reflected directly in the cpu ops rather than using CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT as a proxy. Change-Id: I7fd1db72ca98f0a1b8fd03a979308a7c701a8a54 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72705 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/chipset_apl.cb M src/soc/intel/apollolake/chipset_glk.cb M src/soc/intel/apollolake/cpu.c 4 files changed, 28 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve Lean Sheng Tan: Looks good to me, approved diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 78fefb1..11e3a1e 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -206,20 +206,24 @@ .acpi_fill_ssdt = ssdt_set_above_4g_pci, }; -static struct device_operations cpu_bus_ops = { +struct device_operations apl_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = apollolake_init_cpus, .acpi_fill_ssdt = generate_cpu_entries, }; +struct device_operations glk_cpu_bus_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_fill_ssdt = generate_cpu_entries, +}; + static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) dev->ops = &pci_domain_ops; - else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) - dev->ops = &cpu_bus_ops; else if (dev->path.type == DEVICE_PATH_GPIO) block_gpio_enable(dev); } diff --git a/src/soc/intel/apollolake/chipset_apl.cb b/src/soc/intel/apollolake/chipset_apl.cb index b4f1659..03a6776 100644 --- a/src/soc/intel/apollolake/chipset_apl.cb +++ b/src/soc/intel/apollolake/chipset_apl.cb @@ -1,5 +1,5 @@ chip soc/intel/apollolake - device cpu_cluster 0 on end + device cpu_cluster 0 on ops apl_cpu_bus_ops end device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge device pci 00.1 alias dptf on end # DPTF diff --git a/src/soc/intel/apollolake/chipset_glk.cb b/src/soc/intel/apollolake/chipset_glk.cb index 07eecf5..c6f2db1 100644 --- a/src/soc/intel/apollolake/chipset_glk.cb +++ b/src/soc/intel/apollolake/chipset_glk.cb @@ -1,5 +1,5 @@ chip soc/intel/apollolake - device cpu_cluster 0 on end + device cpu_cluster 0 on ops glk_cpu_bus_ops end device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge device pci 00.1 alias dptf on end # DPTF diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index dba1923..7407415 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -271,8 +271,6 @@ void apollolake_init_cpus(struct device *dev) { - if (CONFIG(SOC_INTEL_COMMON_BLOCK_CPU_MPINIT)) - return; if (!dev->link_list) add_more_links(dev, 1); soc_init_cpus(dev->link_list); -- To view, visit https://review.coreboot.org/c/coreboot/+/72705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fd1db72ca98f0a1b8fd03a979308a7c701a8a54 Gerrit-Change-Number: 72705 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/apl: Hook up cpu ops in devicetree
by Arthur Heymans (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Nico Huber, Sean Rhodes. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72705 ) Change subject: soc/intel/apl: Hook up cpu ops in devicetree ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72705/comment/148f8331_3e3a8d02 PS1, Line 10: afterwards > Sounds odd, did you mean 'before'? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/72705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fd1db72ca98f0a1b8fd03a979308a7c701a8a54 Gerrit-Change-Number: 72705 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:09:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/apl: Hook up cpu ops in devicetree
by Arthur Heymans (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Sean Rhodes, Arthur Heymans. Hello build bot (Jenkins), Nico Huber, Sean Rhodes, Lean Sheng Tan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72705 to look at the new patch set (#2). Change subject: soc/intel/apl: Hook up cpu ops in devicetree ...................................................................... soc/intel/apl: Hook up cpu ops in devicetree This simplifies the code flow of the cpu init. APL can do CPU init after calling FSP-S, while GLK needs to do that before. This is now reflected directly in the cpu ops rather than using CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT as a proxy. Change-Id: I7fd1db72ca98f0a1b8fd03a979308a7c701a8a54 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/chipset_apl.cb M src/soc/intel/apollolake/chipset_glk.cb M src/soc/intel/apollolake/cpu.c 4 files changed, 24 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/72705/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fd1db72ca98f0a1b8fd03a979308a7c701a8a54 Gerrit-Change-Number: 72705 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/{common, meteorlake}: Add support for new MCH
by Subrata Banik (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72835 ) Change subject: soc/intel/{common, meteorlake}: Add support for new MCH ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/meteorlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/72835/comment/3f2efa73_ef39f4ac PS1, Line 184: case PCI_DID_INTEL_MTL_P_ID_5: : soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_5]; this is dead code at this moment as we are not overriding anything per SKU. does it make sense still adding new entry here ? -- To view, visit https://review.coreboot.org/c/coreboot/+/72835 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0c9ce5c58e4bdec5e7245840f0892d651922cd9 Gerrit-Change-Number: 72835 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:08:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Describe TCSS USB ports
by Sridhar Siricilla (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jamie Ryu, Harsha B R, Usha P. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72785 ) Change subject: mb/intel/mtlrvp: Describe TCSS USB ports ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72785 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0054ac4e3d1d9b97cfea615831ec8f3d3e00c9e0 Gerrit-Change-Number: 72785 Gerrit-PatchSet: 4 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:06:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Enable PCIe port 7 for WWAN
by Sridhar Siricilla (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jamie Ryu, Harsha B R, Usha P. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72777 ) Change subject: mb/intel/mtlrvp: Enable PCIe port 7 for WWAN ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72777/comment/a40575b2_f6e487ba PS3, Line 17: \_SB.PCI0.RP07: Enable WWAN for PCI: 00:1c.6 (Fibocom FM-350-GL) > yes, it appears as below, […] You need to update this information as part of commit! -- To view, visit https://review.coreboot.org/c/coreboot/+/72777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib372db9642a3c7b3a21a112fa0e6e0b4bc88a9ea Gerrit-Change-Number: 72777 Gerrit-PatchSet: 4 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:05:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Harsha B R <harsha.b.r(a)intel.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: libpayload: Add VBOOT_SHA_ARMV8_CE config
by Yidi Lin (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Shelley Chen, Douglas Anderson, Julius Werner, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72710 ) Change subject: libpayload: Add VBOOT_SHA_ARMV8_CE config ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72710/comment/890569c3_5da14f46 PS3, Line 23: Cq-Depend: chromium:4170144 > Shouldn't this be right above Change-Id? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/72710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If92830830a0658dfad2a066e9efa624783865cf2 Gerrit-Change-Number: 72710 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Douglas Anderson <dianders(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 08:04:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: libpayload: Add VBOOT_SHA_ARMV8_CE config
by Yidi Lin (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Shelley Chen, Douglas Anderson, Julius Werner, Yidi Lin. Hello Shelley Chen, build bot (Jenkins), Douglas Anderson, Julius Werner, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72710 to look at the new patch set (#4). Change subject: libpayload: Add VBOOT_SHA_ARMV8_CE config ...................................................................... libpayload: Add VBOOT_SHA_ARMV8_CE config Add Kconfig option for VBOOT_SHA_ARMV8_CE, which will use ARMv8 Crypto Extension for SHA256[1] instead of software implementation. [1] https://crrev.com/c/4170144 BUG=b:263514393 BRANCH=corsola TEST='vboot kernel verification' gets 111 msecs improvement on Tentacruel. Before: 1100:finished vboot kernel verification 905,150 (123,518) After: 1100:finished vboot kernel verification 787,277 (12,254) Cq-Depend: chromium:4170144 Change-Id: If92830830a0658dfad2a066e9efa624783865cf2 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M payloads/libpayload/vboot/Kconfig M payloads/libpayload/vboot/Makefile.inc 2 files changed, 35 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/72710/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/72710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If92830830a0658dfad2a066e9efa624783865cf2 Gerrit-Change-Number: 72710 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Douglas Anderson <dianders(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2023