coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/geralt: Calling mt6359p_init() only once in ramstage
by Liju-Clr Chen (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Hung-Te Lin. Liju-Clr Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72839 ) Change subject: mb/google/geralt: Calling mt6359p_init() only once in ramstage ...................................................................... mb/google/geralt: Calling mt6359p_init() only once in ramstage The regulator APIs are called by firmware display and SD card. Therefore, add mt6359p_init() in mainboard.c to initialize mt6359 only once in ramstage. BUG=b:244208960 TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt. Change-Id: I29498d186ba5665ae20e84985174fc10f8d4accd Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/geralt/mainboard.c M src/soc/mediatek/mt8188/msdc.c 2 files changed, 20 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/72839/1 diff --git a/src/mainboard/google/geralt/mainboard.c b/src/mainboard/google/geralt/mainboard.c index ff893e0..c9eef65 100644 --- a/src/mainboard/google/geralt/mainboard.c +++ b/src/mainboard/google/geralt/mainboard.c @@ -4,6 +4,7 @@ #include <device/device.h> #include <soc/bl31.h> #include <soc/msdc.h> +#include <soc/mt6359p.h> #include <soc/usb.h> #include "display.h" @@ -11,6 +12,8 @@ static void mainboard_init(struct device *dev) { + mt6359p_init(); + if (display_init_required()) { if (configure_display() < 0) printk(BIOS_ERR, "%s: Failed to init display\n", __func__); diff --git a/src/soc/mediatek/mt8188/msdc.c b/src/soc/mediatek/mt8188/msdc.c index 37a96a7..3dd629e 100644 --- a/src/soc/mediatek/mt8188/msdc.c +++ b/src/soc/mediatek/mt8188/msdc.c @@ -107,7 +107,6 @@ MSDC1_GPIO_MODE1_0, MSDC1_GPIO_MODE1_VALUE); /* enable SD card power */ - mt6359p_init(); mainboard_enable_regulator(MTK_REGULATOR_VMCH, true); mainboard_enable_regulator(MTK_REGULATOR_VMC, true); mainboard_set_regulator_voltage(MTK_REGULATOR_VMCH, 3000000); -- To view, visit https://review.coreboot.org/c/coreboot/+/72839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29498d186ba5665ae20e84985174fc10f8d4accd Gerrit-Change-Number: 72839 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/corsola: Use get_mt6366_regulator_id() instead of regulator...
by Liju-Clr Chen (Code Review) 06 Feb '23

06 Feb '23

Liju-Clr Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72838 ) Change subject: mb/google/corsola: Use get_mt6366_regulator_id() instead of regulator_id[] ...................................................................... mb/google/corsola: Use get_mt6366_regulator_id() instead of regulator_id[] There might be inconsistent between regulator_id[] and `enum mtk_regulator`. Therefore, use get_mt6366_regulator_id() to replace regulator_id[]. BUG=None TEST=build pass. Change-Id: I3d28ebf2affe4e9464b1a7c1fb2bbb9e31d64a5e Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/corsola/regulator.c 1 file changed, 51 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/72838/1 diff --git a/src/mainboard/google/corsola/regulator.c b/src/mainboard/google/corsola/regulator.c index 4f03c18..7643396 100644 --- a/src/mainboard/google/corsola/regulator.c +++ b/src/mainboard/google/corsola/regulator.c @@ -5,45 +5,54 @@ #include <soc/mt6366.h> #include <soc/regulator.h> -#define REGULATOR_NOT_SUPPORT -1 +#define MTK_REGULATOR_INVALID -1 -static const int regulator_id[] = { - [MTK_REGULATOR_VDD1] = REGULATOR_NOT_SUPPORT, - [MTK_REGULATOR_VDD2] = REGULATOR_NOT_SUPPORT, - [MTK_REGULATOR_VDDQ] = MT6366_VDDQ, - [MTK_REGULATOR_VMDDR] = REGULATOR_NOT_SUPPORT, - [MTK_REGULATOR_VCORE] = MT6366_VCORE, - [MTK_REGULATOR_VCC] = REGULATOR_NOT_SUPPORT, - [MTK_REGULATOR_VCCQ] = REGULATOR_NOT_SUPPORT, - [MTK_REGULATOR_VDRAM1] = MT6366_VDRAM1, - [MTK_REGULATOR_VMCH] = MT6366_VMCH, - [MTK_REGULATOR_VMC] = MT6366_VMC, - [MTK_REGULATOR_VPROC12] = MT6366_VPROC12, - [MTK_REGULATOR_VSRAM_PROC12] = MT6366_VSRAM_PROC12, - [MTK_REGULATOR_VRF12] = MT6366_VRF12, - [MTK_REGULATOR_VCN33] = MT6366_VCN33, -}; - -_Static_assert(ARRAY_SIZE(regulator_id) == MTK_REGULATOR_NUM, "regulator_id size error"); +static int get_mt6366_regulator_id(enum mtk_regulator regulator) +{ + switch (regulator) { + case MTK_REGULATOR_VDDQ: + return MT6366_VDDQ; + case MTK_REGULATOR_VCORE: + return MT6366_VCORE; + case MTK_REGULATOR_VDRAM1: + return MT6366_VDRAM1; + case MTK_REGULATOR_VMCH: + return MT6366_VMCH; + case MTK_REGULATOR_VMC: + return MT6366_VMC; + case MTK_REGULATOR_VPROC12: + return MT6366_VPROC12; + case MTK_REGULATOR_VSRAM_PROC12: + return MT6366_VSRAM_PROC12; + case MTK_REGULATOR_VRF12: + return MT6366_VRF12; + case MTK_REGULATOR_VCN33: + return MT6366_VCN33; + default: + return MTK_REGULATOR_INVALID; + } +} void mainboard_set_regulator_voltage(enum mtk_regulator regulator, uint32_t voltage_uv) { - assert(regulator < MTK_REGULATOR_NUM); + int id; - if (regulator_id[regulator] < 0) { + id = get_mt6366_regulator_id(regulator); + if (id < 0) { printk(BIOS_ERR, "Invalid regulator ID: %d\n", regulator); return; } - mt6366_set_voltage(regulator_id[regulator], voltage_uv); + mt6366_set_voltage(id, voltage_uv); } uint32_t mainboard_get_regulator_voltage(enum mtk_regulator regulator) { - assert(regulator < MTK_REGULATOR_NUM); + int id; - if (regulator_id[regulator] < 0) { + id = get_mt6366_regulator_id(regulator); + if (id < 0) { printk(BIOS_ERR, "Invalid regulator ID: %d\n", regulator); return 0; } - return mt6366_get_voltage(regulator_id[regulator]); + return mt6366_get_voltage(id); } -- To view, visit https://review.coreboot.org/c/coreboot/+/72838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d28ebf2affe4e9464b1a7c1fb2bbb9e31d64a5e Gerrit-Change-Number: 72838 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/geralt: Add power-on sequence for BOE_TV110C9M_LL0
by Liju-Clr Chen (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen, Yu-Ping Wu. Hello Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72749 to look at the new patch set (#4). Change subject: mb/google/geralt: Add power-on sequence for BOE_TV110C9M_LL0 ...................................................................... mb/google/geralt: Add power-on sequence for BOE_TV110C9M_LL0 For Geralt, we use BOE_TV110C9M_LL0 as MIPI firmware display, so add the power-on sequence for BOE_TV110C9M_LL0. BUG=b:244208960 TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt. Change-Id: I3ef0b2e26d8cc0dc35c2985363ee4c3557dac8a9 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/geralt/panel.c M src/mainboard/google/geralt/panel.h M src/mainboard/google/geralt/panel_geralt.c M src/soc/mediatek/mt8188/Makefile.inc 4 files changed, 80 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/72749/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/72749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ef0b2e26d8cc0dc35c2985363ee4c3557dac8a9 Gerrit-Change-Number: 72749 Gerrit-PatchSet: 4 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/mediatek: Add support for regulator VM18
by Liju-Clr Chen (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen, Rex-BC Chen. Hello Hung-Te Lin, Rex-BC Chen, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72747 to look at the new patch set (#3). Change subject: soc/mediatek: Add support for regulator VM18 ...................................................................... soc/mediatek: Add support for regulator VM18 To provide power to MIPI panel BOE_TV110C9M_LL0, add support for regulator VM18. BUG=b:244208960 TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt. Change-Id: Ib8c3b2df1157b23b37492b1e9b1716903ea67799 Signed-off-by: Sen Chu <sen.chu(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/common/include/soc/mt6359p.h M src/soc/mediatek/common/include/soc/regulator.h M src/soc/mediatek/common/mt6359p.c 3 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/72747/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/72747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8c3b2df1157b23b37492b1e9b1716903ea67799 Gerrit-Change-Number: 72747 Gerrit-PatchSet: 3 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya: Create aurash variant
by Zoey Wu (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Tarun Tuli, Zoey Wu, Raihow Shi. Zoey Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72837 ) Change subject: mb/google/brya: Create aurash variant ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/72837 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595102778071f822c5cf69ceadeed174e5ea4836 Gerrit-Change-Number: 72837 Gerrit-PatchSet: 1 Gerrit-Owner: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 10:24:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya: Create aurash variant
by Zoey Wu (Code Review) 06 Feb '23

06 Feb '23

Zoey Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72837 ) Change subject: mb/google/brya: Create aurash variant ...................................................................... mb/google/brya: Create aurash variant Create the aurash variant of the brask reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:263691099 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a make sure the build includes GOOGLE_AURASH Change-Id: I595102778071f822c5cf69ceadeed174e5ea4836 Signed-off-by: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/aurash/include/variant/ec.h A src/mainboard/google/brya/variants/aurash/include/variant/gpio.h A src/mainboard/google/brya/variants/aurash/overridetree.cb 5 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/72837/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index dad9821..7e01525 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -225,6 +225,7 @@ default "Gladios" if BOARD_GOOGLE_GLADIOS default "Marasov" if BOARD_GOOGLE_MARASOV default "Omnigul" if BOARD_GOOGLE_OMNIGUL + default "Aurash" if BOARD_GOOGLE_AURASH config VARIANT_DIR default "brya0" if BOARD_GOOGLE_BRYA0 @@ -267,6 +268,7 @@ default "gladios" if BOARD_GOOGLE_GLADIOS default "marasov" if BOARD_GOOGLE_MARASOV default "omnigul" if BOARD_GOOGLE_OMNIGUL + default "aurash" if BOARD_GOOGLE_AURASH config VBOOT select VBOOT_EARLY_EC_SYNC if !BOARD_GOOGLE_BASEBOARD_NISSA diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 087837f..709cf07 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -332,3 +332,8 @@ select SOC_INTEL_RAPTORLAKE select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS select DRIVERS_INTEL_ISH + +config BOARD_GOOGLE_AURASH + bool "-> Aurash" + select BOARD_GOOGLE_BASEBOARD_BRASK + diff --git a/src/mainboard/google/brya/variants/aurash/include/variant/ec.h b/src/mainboard/google/brya/variants/aurash/include/variant/ec.h new file mode 100644 index 0000000..7a2a6ff --- /dev/null +++ b/src/mainboard/google/brya/variants/aurash/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/aurash/include/variant/gpio.h b/src/mainboard/google/brya/variants/aurash/include/variant/gpio.h new file mode 100644 index 0000000..c4fe342 --- /dev/null +++ b/src/mainboard/google/brya/variants/aurash/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/aurash/overridetree.cb b/src/mainboard/google/brya/variants/aurash/overridetree.cb new file mode 100644 index 0000000..4f2c04a --- /dev/null +++ b/src/mainboard/google/brya/variants/aurash/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end -- To view, visit https://review.coreboot.org/c/coreboot/+/72837 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595102778071f822c5cf69ceadeed174e5ea4836 Gerrit-Change-Number: 72837 Gerrit-PatchSet: 1 Gerrit-Owner: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: libpayload: Add VBOOT_SHA_ARMV8_CE config
by Yu-Ping Wu (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Shelley Chen, Douglas Anderson, Julius Werner, Arthur Heymans, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72710 ) Change subject: libpayload: Add VBOOT_SHA_ARMV8_CE config ...................................................................... Patch Set 4: (1 comment) File payloads/libpayload/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/72710/comment/61c0812e_4b7c7e31 PS4, Line 40: ARMV8_CRYPTO_EXT > Where is this symbol consumed? I can't find it in 3rdparty/vboot or payload/ The vboot_reference patch CL:4170144 is still under review. We'll update the vboot submodule before merging this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/72710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If92830830a0658dfad2a066e9efa624783865cf2 Gerrit-Change-Number: 72710 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Douglas Anderson <dianders(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 09:40:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel: Use common codeflow for MP init
by Lean Sheng Tan (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Jonathan Zhang, Johnny Lin, Kapil Porwal, Christian Walter, Arthur Heymans, Werner Zeh, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72604 ) Change subject: soc/intel: Use common codeflow for MP init ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia822468a6f15565b97e57612a294a0b80b45b932 Gerrit-Change-Number: 72604 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 09:31:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/rtd3: Hook up supported states to Kconfig
by Sean Rhodes (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Matt DeVillier, Angel Pons, Eric Lai. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72765 ) Change subject: soc/intel/rtd3: Hook up supported states to Kconfig ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72765/comment/22c98eea_f642d1d2 PS1, Line 9: S3 does not support D3Cold, > IMHO the power rail of S3 on their board can't support it. D3cold more like the HW support. Adjusted so it's configurable, but defaults as there are 3 boards in the tree that need it. -- To view, visit https://review.coreboot.org/c/coreboot/+/72765 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a4b89132b594ad568a5851137575f921f8e2a2e Gerrit-Change-Number: 72765 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 09:28:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT
by Sean Rhodes (Code Review) 06 Feb '23

06 Feb '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72799 ) Change subject: device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/72799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04abc7efe2db06ae6daba9e09835441b62ee44f4 Gerrit-Change-Number: 72799 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 06 Feb 2023 09:27:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2023