coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: util/docker: Add libgpiod-dev to coreboot-sdk for flashrom
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72371 ) Change subject: util/docker: Add libgpiod-dev to coreboot-sdk for flashrom ...................................................................... util/docker: Add libgpiod-dev to coreboot-sdk for flashrom Flashrom needs libgpiod-dev to build the new bitbanging programmer driver for Linux libgpiod. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I88f7e11fab115487cc44d4b89b3eab4745ad058d Reviewed-on: https://review.coreboot.org/c/coreboot/+/72371 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M util/docker/coreboot-sdk/Dockerfile 1 file changed, 17 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved diff --git a/util/docker/coreboot-sdk/Dockerfile b/util/docker/coreboot-sdk/Dockerfile index d135fd7..e9ae592 100644 --- a/util/docker/coreboot-sdk/Dockerfile +++ b/util/docker/coreboot-sdk/Dockerfile @@ -49,6 +49,7 @@ libftdi1-dev \ libglib2.0-dev \ libgmp-dev \ + libgpiod-dev \ libjaylink-dev \ liblzma-dev \ libncurses5-dev \ -- To view, visit https://review.coreboot.org/c/coreboot/+/72371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88f7e11fab115487cc44d4b89b3eab4745ad058d Gerrit-Change-Number: 72371 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: inc/device: Add extended capability ID for ATS
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71929 ) Change subject: inc/device: Add extended capability ID for ATS ...................................................................... inc/device: Add extended capability ID for ATS Add extended capability ID for Address Translation Services. This definition can be found in PCI Express Base Specification rev6.0 9.3.7. Signed-off-by: Tim Chu <Tim.Chu(a)quantatw.com> Change-Id: I777070ea223fc7e83c510c8eadbe4e028825eef6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71929 Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/include/device/pci_def.h 1 file changed, 19 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved Felix Held: Looks good to me, approved diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index ef23b94..c13e054 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -468,6 +468,7 @@ /* Extended Capability lists*/ #define PCIE_EXT_CAP_OFFSET 0x100 #define PCIE_EXT_CAP_AER_ID 0x0001 +#define PCIE_EXT_CAP_ID_ATS 0x000F #define PCIE_EXT_CAP_L1SS_ID 0x001E #define PCIE_EXT_CAP_LTR_ID 0x0018 #define PCIE_EXT_CAP_RESIZABLE_BAR 0x0015 -- To view, visit https://review.coreboot.org/c/coreboot/+/71929 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I777070ea223fc7e83c510c8eadbe4e028825eef6 Gerrit-Change-Number: 71929 Gerrit-PatchSet: 8 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: inc/device: Add extended capability ID for ATS
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jonathan Zhang, Johnny Lin, David Hendricks, Shuming Chu (Shuming), Tim Chu. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71929 ) Change subject: inc/device: Add extended capability ID for ATS ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71929 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I777070ea223fc7e83c510c8eadbe4e028825eef6 Gerrit-Change-Number: 71929 Gerrit-PatchSet: 7 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 12:40:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/data_fabric_helper: normalize addresses in debug print
by Fred Reitberger (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Arthur Heymans, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72739 ) Change subject: soc/amd/common/data_fabric_helper: normalize addresses in debug print ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62eeb88ddac6a7a421fccc8e433523459117976a Gerrit-Change-Number: 72739 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 06 Feb 2023 12:38:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/data_fabric_helper: normalize addresses in debug print
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Arthur Heymans, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72739 ) Change subject: soc/amd/common/data_fabric_helper: normalize addresses in debug print ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Potentially could use the df_mmio_ctrl union to read control, then something like: […] the ffff for the limit in that case isn't wrong and having one special case behave differently than the other cases is also something where i'm not sure if it's a good idea -- To view, visit https://review.coreboot.org/c/coreboot/+/72739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62eeb88ddac6a7a421fccc8e433523459117976a Gerrit-Change-Number: 72739 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Mon, 06 Feb 2023 12:34:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Fred Reitberger <reitbergerfred(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/phoenix/include/cpu: rename CPUID define to match CPU model
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72843 ) Change subject: soc/amd/phoenix/include/cpu: rename CPUID define to match CPU model ...................................................................... soc/amd/phoenix/include/cpu: rename CPUID define to match CPU model CPUID 0x00a70f80 is Phoenix 2 and not Phoenix, so update the define name to match. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ie7500130d5470fdd824980b81746f3a0f6d277d4 --- M src/soc/amd/phoenix/cpu.c M src/soc/amd/phoenix/include/soc/cpu.h 2 files changed, 16 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/72843/1 diff --git a/src/soc/amd/phoenix/cpu.c b/src/soc/amd/phoenix/cpu.c index e9a510f..68e440b 100644 --- a/src/soc/amd/phoenix/cpu.c +++ b/src/soc/amd/phoenix/cpu.c @@ -50,7 +50,8 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, PHOENIX_A0_CPUID}, /* TODO: Update for Phoenix */ + /* TODO: Add Phoenix CPUID */ + { X86_VENDOR_AMD, PHOENIX2_A0_CPUID}, { 0, 0 }, }; diff --git a/src/soc/amd/phoenix/include/soc/cpu.h b/src/soc/amd/phoenix/include/soc/cpu.h index 294aa32..f99c316 100644 --- a/src/soc/amd/phoenix/include/soc/cpu.h +++ b/src/soc/amd/phoenix/include/soc/cpu.h @@ -3,6 +3,6 @@ #ifndef AMD_PHOENIX_CPU_H #define AMD_PHOENIX_CPU_H -#define PHOENIX_A0_CPUID 0x00a70f80 +#define PHOENIX2_A0_CPUID 0x00a70f80 #endif /* AMD_PHOENIX_CPU_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/72843 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie7500130d5470fdd824980b81746f3a0f6d277d4 Gerrit-Change-Number: 72843 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: amdfwtool: Add phoenix and glinda in get_psp_fw_type
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72717 ) Change subject: amdfwtool: Add phoenix and glinda in get_psp_fw_type ...................................................................... amdfwtool: Add phoenix and glinda in get_psp_fw_type Change-Id: If80cc5396703cef41cc615008c9f0dac0b7bbb09 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72717 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kangheui Won <khwon(a)chromium.org> --- M util/amdfwtool/amdfwtool.c 1 file changed, 15 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index f4fd6ee..1703cf7 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -762,6 +762,8 @@ { switch (soc_id) { case PLATFORM_MENDOCINO: + case PLATFORM_PHOENIX: + case PLATFORM_GLINDA: /* Fallback to fw_type if fw_id is not populated, which serves the same purpose on older SoCs. */ return header->fw_id ? header->fw_id : header->fw_type; -- To view, visit https://review.coreboot.org/c/coreboot/+/72717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If80cc5396703cef41cc615008c9f0dac0b7bbb09 Gerrit-Change-Number: 72717 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in qc_blobs[master]: sc7280: Update AOP firmware to version 454
by Santhosh Vaginepalli (Code Review) 06 Feb '23

06 Feb '23

Santhosh Vaginepalli has uploaded this change for review. ( https://review.coreboot.org/c/qc_blobs/+/72842 ) Change subject: sc7280: Update AOP firmware to version 454 ...................................................................... sc7280: Update AOP firmware to version 454 *L3C min voltage update to 1.8v Change-Id: I3748642f914e6e20a648b4fadc71cd87ffc80150 Signed-off-by: Sai Santhosh Vaginepalli <svaginep(a)hydcbspbld01.qualcomm.com> --- M sc7280/aop/AOP_AAAAANAAO.elf M sc7280/aop/AOP_AAAAANAZO.elf M sc7280/aop/Release_Notes.txt M sc7280/aop/aop.mbn 4 files changed, 34 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/qc_blobs refs/changes/42/72842/1 diff --git a/sc7280/aop/AOP_AAAAANAAO.elf b/sc7280/aop/AOP_AAAAANAAO.elf index 9f704c4..75086f4 100644 --- a/sc7280/aop/AOP_AAAAANAAO.elf +++ b/sc7280/aop/AOP_AAAAANAAO.elf Binary files differ diff --git a/sc7280/aop/AOP_AAAAANAZO.elf b/sc7280/aop/AOP_AAAAANAZO.elf index 28083e7..0f84c4b 100644 --- a/sc7280/aop/AOP_AAAAANAZO.elf +++ b/sc7280/aop/AOP_AAAAANAZO.elf Binary files differ diff --git a/sc7280/aop/Release_Notes.txt b/sc7280/aop/Release_Notes.txt index 94185ac..689a173 100644 --- a/sc7280/aop/Release_Notes.txt +++ b/sc7280/aop/Release_Notes.txt @@ -1,3 +1,25 @@ +================== Release 454 ================================ +This Release Notes file covers these blobs: + * aop.mbn + * AOP_AAAAANAZO.elf + +Version : 000454 + +Release Date : February, 2023 + +Supported Silicon : SC7280 + +Changes since last version: + *L3C min voltage update to 1.8V + +aop.mbn is used to generate coreboot image. +AOP_AAAAANAZO.elf is used for debugging purpose if needed. + +No special instructions, requirements or dependencies, files must be +present in this folder to be pulled in during coreboot build + +Errata : Nothing to report + ================== Release 410 ================================ This Release Notes file covers these blobs: * aop.mbn diff --git a/sc7280/aop/aop.mbn b/sc7280/aop/aop.mbn index dceb584..336f805 100644 --- a/sc7280/aop/aop.mbn +++ b/sc7280/aop/aop.mbn Binary files differ -- To view, visit https://review.coreboot.org/c/qc_blobs/+/72842 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: qc_blobs Gerrit-Branch: master Gerrit-Change-Id: I3748642f914e6e20a648b4fadc71cd87ffc80150 Gerrit-Change-Number: 72842 Gerrit-PatchSet: 1 Gerrit-Owner: Santhosh Vaginepalli <svaginep(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/glinda: remove LIDS field from global NVS
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72187 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/amd/glinda: remove LIDS field from global NVS ...................................................................... soc/amd/glinda: remove LIDS field from global NVS Since the LIDS field is only used in the ACPI code and not in the C code of any mainboard using the Glinda SoC, remove it form the global NVS. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I627d05c09d9637caf15e17285dd2c8e0389747c5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72187 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/soc/amd/glinda/acpi/globalnvs.asl M src/soc/amd/glinda/include/soc/nvs.h 2 files changed, 22 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/soc/amd/glinda/acpi/globalnvs.asl b/src/soc/amd/glinda/acpi/globalnvs.asl index cc0453a..512f9e8 100644 --- a/src/soc/amd/glinda/acpi/globalnvs.asl +++ b/src/soc/amd/glinda/acpi/globalnvs.asl @@ -8,8 +8,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ - LIDS, 8, // 0x00 - LID State - CBMC, 32, // 0x01 - 0x04 - coreboot Memory Console - PM1I, 64, // 0x05 - 0x0c - System Wake Source - PM1 Index - GPEI, 64, // 0x0d - 0x14 - GPE Wake Source + CBMC, 32, // 0x00 - 0x03 - coreboot Memory Console + PM1I, 64, // 0x04 - 0x0b - System Wake Source - PM1 Index + GPEI, 64, // 0x0c - 0x13 - GPE Wake Source } diff --git a/src/soc/amd/glinda/include/soc/nvs.h b/src/soc/amd/glinda/include/soc/nvs.h index d328e68..1e663e4 100644 --- a/src/soc/amd/glinda/include/soc/nvs.h +++ b/src/soc/amd/glinda/include/soc/nvs.h @@ -13,10 +13,9 @@ struct __packed global_nvs { /* Miscellaneous */ - uint8_t lids; /* 0x00 - LID State */ - uint32_t cbmc; /* 0x01 - 0x04 - coreboot Memory Console */ - uint64_t pm1i; /* 0x05 - 0x0c - System Wake Source - PM1 Index */ - uint64_t gpei; /* 0x0d - 0x14 - GPE Wake Source */ + uint32_t cbmc; /* 0x00 - 0x03 - coreboot Memory Console */ + uint64_t pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */ + uint64_t gpei; /* 0x0c - 0x13 - GPE Wake Source */ }; #endif /* AMD_GLINDA_NVS_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/72187 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I627d05c09d9637caf15e17285dd2c8e0389747c5 Gerrit-Change-Number: 72187 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/amd/glinda: remove LIDS field from global NVS
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Felix Held. Hello build bot (Jenkins), Raul Rangel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72187 to look at the new patch set (#2). Change subject: soc/amd/glinda: remove LIDS field from global NVS ...................................................................... soc/amd/glinda: remove LIDS field from global NVS Since the LIDS field is only used in the ACPI code and not in the C code of any mainboard using the Glinda SoC, remove it form the global NVS. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I627d05c09d9637caf15e17285dd2c8e0389747c5 --- M src/soc/amd/glinda/acpi/globalnvs.asl M src/soc/amd/glinda/include/soc/nvs.h 2 files changed, 19 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/72187/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72187 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I627d05c09d9637caf15e17285dd2c8e0389747c5 Gerrit-Change-Number: 72187 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2023