coreboot-gerrit February 2023

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[S] Change in coreboot[master]: soc/amd/stoneyridge/cpu: use CPUID_ALL_STEPPINGS_MASK
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Matt DeVillier. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72855 ) Change subject: soc/amd/stoneyridge/cpu: use CPUID_ALL_STEPPINGS_MASK ...................................................................... soc/amd/stoneyridge/cpu: use CPUID_ALL_STEPPINGS_MASK Use CPUID_ALL_STEPPINGS_MASK as CPUID match mask to support all family 15h model 60h and 70h steppings. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Id05f849d59c04efa9f38dd66892f3cb99d94e3ff --- M src/soc/amd/stoneyridge/cpu.c 1 file changed, 15 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/72855/1 diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index a40b54b..5ecf0c6 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -60,8 +60,8 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, 0x660f01, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, 0x670f00, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, 0x660f00, CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, 0x670f00, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72855 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id05f849d59c04efa9f38dd66892f3cb99d94e3ff Gerrit-Change-Number: 72855 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: cpu/intel/model_206ax/model_206ax_init: use CPUID_ALL_STEPPINGS_MASK
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72854 ) Change subject: cpu/intel/model_206ax/model_206ax_init: use CPUID_ALL_STEPPINGS_MASK ...................................................................... cpu/intel/model_206ax/model_206ax_init: use CPUID_ALL_STEPPINGS_MASK Use CPUID_ALL_STEPPINGS_MASK to only need one CPU device ID table entry per family & model combination and not one per stepping. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I46020d5b1b1fba8449c3823fac1369e5670d91c0 --- M src/cpu/intel/model_206ax/model_206ax_init.c 1 file changed, 15 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/72854/1 diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index aecd61c..04a9d2d 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -427,16 +427,8 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x206a0, CPUID_EXACT_MATCH_MASK }, /* Intel Sandybridge */ - { X86_VENDOR_INTEL, 0x206a6, CPUID_EXACT_MATCH_MASK }, /* Intel Sandybridge D1 */ - { X86_VENDOR_INTEL, 0x206a7, CPUID_EXACT_MATCH_MASK }, /* Intel Sandybridge D2/J1 */ - { X86_VENDOR_INTEL, 0x306a0, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a2, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a4, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a5, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a6, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a8, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a9, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x206a0, CPUID_ALL_STEPPINGS_MASK }, /* Intel Sandybridge */ + { X86_VENDOR_INTEL, 0x306a0, CPUID_ALL_STEPPINGS_MASK }, /* Intel IvyBridge */ { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46020d5b1b1fba8449c3823fac1369e5670d91c0 Gerrit-Change-Number: 72854 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/phoenix/include/cpu: add Phoenix CPUID
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72853 ) Change subject: soc/amd/phoenix/include/cpu: add Phoenix CPUID ...................................................................... soc/amd/phoenix/include/cpu: add Phoenix CPUID There are multiple Phoenix steppings, but that is now covered by using CPUID_ALL_STEPPINGS_MASK. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Id4eb3502dec5ebdfdbba263b15b34621952d0554 --- M src/soc/amd/phoenix/cpu.c M src/soc/amd/phoenix/include/soc/cpu.h 2 files changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/72853/1 diff --git a/src/soc/amd/phoenix/cpu.c b/src/soc/amd/phoenix/cpu.c index 9c51a57..8e24435 100644 --- a/src/soc/amd/phoenix/cpu.c +++ b/src/soc/amd/phoenix/cpu.c @@ -50,7 +50,7 @@ }; static struct cpu_device_id cpu_table[] = { - /* TODO: Add Phoenix CPUID */ + { X86_VENDOR_AMD, PHOENIX_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { X86_VENDOR_AMD, PHOENIX2_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; diff --git a/src/soc/amd/phoenix/include/soc/cpu.h b/src/soc/amd/phoenix/include/soc/cpu.h index f99c316..34784c4 100644 --- a/src/soc/amd/phoenix/include/soc/cpu.h +++ b/src/soc/amd/phoenix/include/soc/cpu.h @@ -3,6 +3,7 @@ #ifndef AMD_PHOENIX_CPU_H #define AMD_PHOENIX_CPU_H +#define PHOENIX_A0_CPUID 0x00a70f40 #define PHOENIX2_A0_CPUID 0x00a70f80 #endif /* AMD_PHOENIX_CPU_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/72853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id4eb3502dec5ebdfdbba263b15b34621952d0554 Gerrit-Change-Number: 72853 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/glinda/cpu: use CPUID_ALL_STEPPINGS_MASK
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72852 ) Change subject: soc/amd/glinda/cpu: use CPUID_ALL_STEPPINGS_MASK ...................................................................... soc/amd/glinda/cpu: use CPUID_ALL_STEPPINGS_MASK Use CPUID_ALL_STEPPINGS_MASK as CPUID match mask to support all Glinda steppings once GLINDA_A0_CPUID is updated. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ic9b8cbb2dc925a8258db6a4eb0d1b00b2745637f --- M src/soc/amd/glinda/cpu.c 1 file changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/72852/1 diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index c5a0ec4..e441ead 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -50,7 +50,7 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_EXACT_MATCH_MASK }, /* TODO: Update for Glinda */ + { X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, /* TODO: Update for Glinda */ { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9b8cbb2dc925a8258db6a4eb0d1b00b2745637f Gerrit-Change-Number: 72852 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/phoenix/cpu: use CPUID_ALL_STEPPINGS_MASK
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72851 ) Change subject: soc/amd/phoenix/cpu: use CPUID_ALL_STEPPINGS_MASK ...................................................................... soc/amd/phoenix/cpu: use CPUID_ALL_STEPPINGS_MASK Use CPUID_ALL_STEPPINGS_MASK as CPUID match mask to support all Phoenix 2 steppings that might be available in the future. Right now it shouldn't change any behavior. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: If9878b4687360250cac4cfe1409d5dbad7147cf3 --- M src/soc/amd/phoenix/cpu.c 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/72851/1 diff --git a/src/soc/amd/phoenix/cpu.c b/src/soc/amd/phoenix/cpu.c index cba22e9..9c51a57 100644 --- a/src/soc/amd/phoenix/cpu.c +++ b/src/soc/amd/phoenix/cpu.c @@ -51,7 +51,7 @@ static struct cpu_device_id cpu_table[] = { /* TODO: Add Phoenix CPUID */ - { X86_VENDOR_AMD, PHOENIX2_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, PHOENIX2_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9878b4687360250cac4cfe1409d5dbad7147cf3 Gerrit-Change-Number: 72851 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/mendocino/cpu: use CPUID_ALL_STEPPINGS_MASK
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72850 ) Change subject: soc/amd/mendocino/cpu: use CPUID_ALL_STEPPINGS_MASK ...................................................................... soc/amd/mendocino/cpu: use CPUID_ALL_STEPPINGS_MASK Use CPUID_ALL_STEPPINGS_MASK as CPUID match mask to support all Mendocino steppings that might be available in the future. Right now it shouldn't change any behavior. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I77ea8c6162667e0a318176e62078b1f57726c10c --- M src/soc/amd/mendocino/cpu.c 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/72850/1 diff --git a/src/soc/amd/mendocino/cpu.c b/src/soc/amd/mendocino/cpu.c index 7561b24..f59a910 100644 --- a/src/soc/amd/mendocino/cpu.c +++ b/src/soc/amd/mendocino/cpu.c @@ -48,7 +48,7 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, MENDOCINO_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, MENDOCINO_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72850 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77ea8c6162667e0a318176e62078b1f57726c10c Gerrit-Change-Number: 72850 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/cezanne: use CPUID_ALL_STEPPINGS_MASK to support all steppings
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72849 ) Change subject: soc/amd/cezanne: use CPUID_ALL_STEPPINGS_MASK to support all steppings ...................................................................... soc/amd/cezanne: use CPUID_ALL_STEPPINGS_MASK to support all steppings Use CPUID_ALL_STEPPINGS_MASK as CPUID match mask to support all Cezanne steppings. This adds support for Cezanne stepping A1 and possible future steppings. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Idb020052685d9369109f391797fdd8f8790a91d1 --- M src/soc/amd/cezanne/cpu.c 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/72849/1 diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c index ddd4afe..4d3fa1e 100644 --- a/src/soc/amd/cezanne/cpu.c +++ b/src/soc/amd/cezanne/cpu.c @@ -47,7 +47,7 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, CEZANNE_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, CEZANNE_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb020052685d9369109f391797fdd8f8790a91d1 Gerrit-Change-Number: 72849 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/picasso/cpu: use CPUID_ALL_STEPPINGS_MASK
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72848 ) Change subject: soc/amd/picasso/cpu: use CPUID_ALL_STEPPINGS_MASK ...................................................................... soc/amd/picasso/cpu: use CPUID_ALL_STEPPINGS_MASK Use CPUID_ALL_STEPPINGS_MASK to only need one CPU device ID table entry per family & model combination and not one per stepping. TEST=Mandolin with a Picasso APU with PICASSO_B1_CPUID (0x00810f81) still finished mpinit and boots successfully even though now only PICASSO_B0_CPUID (0x00810f80) with CPUID_ALL_STEPPINGS_MASK specified as device match mask. When commenting out the line with PICASSO_B0_CPUID as a negative test, mpinit fails as expected. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I00ba43834ad86ecffa09d60599b17d122acd0b99 --- M src/soc/amd/picasso/cpu.c 1 file changed, 22 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/72848/1 diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c index 0ec753d..5d206e4 100644 --- a/src/soc/amd/picasso/cpu.c +++ b/src/soc/amd/picasso/cpu.c @@ -48,11 +48,9 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, RAVEN1_B0_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, PICASSO_B0_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, PICASSO_B1_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, RAVEN2_A0_CPUID, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_AMD, RAVEN2_A1_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, RAVEN1_B0_CPUID, CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, PICASSO_B0_CPUID, CPUID_ALL_STEPPINGS_MASK }, + { X86_VENDOR_AMD, RAVEN2_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, { 0, 0, 0 }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/72848 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00ba43834ad86ecffa09d60599b17d122acd0b99 Gerrit-Change-Number: 72848 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: arch/x86/cpu: introduce and use device_match_mask
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Jeff Daly, Sean Rhodes, Matt DeVillier, Jonathan Zhang, Johnny Lin, Christian Walter, Vanessa Eusebio, Arthur Heymans, Fred Reitberger, Tim Chu. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72847 ) Change subject: arch/x86/cpu: introduce and use device_match_mask ...................................................................... arch/x86/cpu: introduce and use device_match_mask Instead of always doing exact matches between the CPUID read in identify_cpu and the device entries of the CPU device ID table, offer the possibility to use a bit mask in the CPUID matching. This allows covering all steppings of a CPU family/model with one entry and avoids that case of a missing new stepping causing the CPUs not being properly initialized. Some of the CPU device ID tables can now be deduplicated using the CPUID_ALL_STEPPINGS_MASK define, but that's outside of the scope of this patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I0540b514ca42591c0d3468307a82b5612585f614 --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h M src/cpu/amd/pi/00730F01/model_16_init.c M src/cpu/intel/haswell/haswell_init.c M src/cpu/intel/model_1067x/model_1067x_init.c M src/cpu/intel/model_106cx/model_106cx_init.c M src/cpu/intel/model_2065x/model_2065x_init.c M src/cpu/intel/model_206ax/model_206ax_init.c M src/cpu/intel/model_65x/model_65x_init.c M src/cpu/intel/model_67x/model_67x_init.c M src/cpu/intel/model_68x/model_68x_init.c M src/cpu/intel/model_6bx/model_6bx_init.c M src/cpu/intel/model_6ex/model_6ex_init.c M src/cpu/intel/model_6fx/model_6fx_init.c M src/cpu/intel/model_6xx/model_6xx_init.c M src/cpu/intel/model_f2x/model_f2x_init.c M src/cpu/intel/model_f3x/model_f3x_init.c M src/cpu/intel/model_f4x/model_f4x_init.c M src/cpu/qemu-x86/qemu.c M src/soc/amd/cezanne/cpu.c M src/soc/amd/glinda/cpu.c M src/soc/amd/mendocino/cpu.c M src/soc/amd/phoenix/cpu.c M src/soc/amd/picasso/cpu.c M src/soc/amd/stoneyridge/cpu.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/baytrail/cpu.c M src/soc/intel/braswell/cpu.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/denverton_ns/cpu.c M src/soc/intel/xeon_sp/cpx/cpu.c M src/soc/intel/xeon_sp/skx/cpu.c 32 files changed, 244 insertions(+), 202 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/72847/1 diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index a51cadb..53c9a7b 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -188,6 +188,11 @@ } } +static bool cpuid_match(uint32_t a, uint32_t b, uint32_t mask) +{ + return (a & mask) == (b & mask); +} + struct cpu_driver *find_cpu_driver(struct device *cpu) { struct cpu_driver *driver; @@ -196,7 +201,7 @@ for (id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) { if ((cpu->vendor == id->vendor) && - (cpu->device == id->device)) + cpuid_match(cpu->device, id->device, id->device_match_mask)) return driver; if (id->vendor == X86_VENDOR_ANY) return driver; diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 26315eb..ffa80a8 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -111,9 +111,13 @@ struct device; +#define CPUID_EXACT_MATCH_MASK 0xffffffff +#define CPUID_ALL_STEPPINGS_MASK 0xfffffff0 + struct cpu_device_id { unsigned int vendor; uint32_t device; + uint32_t device_match_mask; /* only used in CPU table */ }; struct cpu_driver { diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c index 5b43a07..3806407 100644 --- a/src/cpu/amd/pi/00730F01/model_16_init.c +++ b/src/cpu/amd/pi/00730F01/model_16_init.c @@ -58,9 +58,9 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, 0x730F00 }, - { X86_VENDOR_AMD, 0x730F01 }, - { 0, 0 }, + { X86_VENDOR_AMD, 0x730F00, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, 0x730F01, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver model_16 __cpu_driver = { diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 5a0b09d..a8193bf 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -640,18 +640,18 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, CPUID_HASWELL_A0 }, - { X86_VENDOR_INTEL, CPUID_HASWELL_B0 }, - { X86_VENDOR_INTEL, CPUID_HASWELL_C0 }, - { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_B0 }, - { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_C0 }, - { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_B0 }, - { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_C0 }, - { X86_VENDOR_INTEL, CPUID_BROADWELL_C0 }, - { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_C0 }, - { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_D0 }, - { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_E0 }, - { 0, 0 }, + { X86_VENDOR_INTEL, CPUID_HASWELL_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_HASWELL_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_HASWELL_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_D0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_E0, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 825a246..226495b 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -265,10 +265,10 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x10676 }, - { X86_VENDOR_INTEL, 0x10677 }, - { X86_VENDOR_INTEL, 0x1067A }, - { 0, 0 }, + { X86_VENDOR_INTEL, 0x10676, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x10677, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x1067A, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 4cf16d8..ba89f3d 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -80,9 +80,9 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x106c0 }, /* Intel Atom 230 */ - { X86_VENDOR_INTEL, 0x106ca }, /* Intel Atom D5xx */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x106c0, CPUID_EXACT_MATCH_MASK }, /* Intel Atom 230 */ + { X86_VENDOR_INTEL, 0x106ca, CPUID_EXACT_MATCH_MASK }, /* Intel Atom D5xx */ + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 389989c..0556a15 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -175,12 +175,12 @@ /* Arrandale / Clarkdale CPU IDs */ static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x20650 }, - { X86_VENDOR_INTEL, 0x20651 }, - { X86_VENDOR_INTEL, 0x20652 }, - { X86_VENDOR_INTEL, 0x20654 }, - { X86_VENDOR_INTEL, 0x20655 }, - { 0, 0 }, + { X86_VENDOR_INTEL, 0x20650, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x20651, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x20652, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x20654, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x20655, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 6522e0fe..aecd61c 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -427,17 +427,17 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x206a0 }, /* Intel Sandybridge */ - { X86_VENDOR_INTEL, 0x206a6 }, /* Intel Sandybridge D1 */ - { X86_VENDOR_INTEL, 0x206a7 }, /* Intel Sandybridge D2/J1 */ - { X86_VENDOR_INTEL, 0x306a0 }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a2 }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a4 }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a5 }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a6 }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a8 }, /* Intel IvyBridge */ - { X86_VENDOR_INTEL, 0x306a9 }, /* Intel IvyBridge */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x206a0, CPUID_EXACT_MATCH_MASK }, /* Intel Sandybridge */ + { X86_VENDOR_INTEL, 0x206a6, CPUID_EXACT_MATCH_MASK }, /* Intel Sandybridge D1 */ + { X86_VENDOR_INTEL, 0x206a7, CPUID_EXACT_MATCH_MASK }, /* Intel Sandybridge D2/J1 */ + { X86_VENDOR_INTEL, 0x306a0, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x306a2, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x306a4, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x306a5, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x306a6, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x306a8, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { X86_VENDOR_INTEL, 0x306a9, CPUID_EXACT_MATCH_MASK }, /* Intel IvyBridge */ + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_65x/model_65x_init.c b/src/cpu/intel/model_65x/model_65x_init.c index 15246b6..bc1dc2d 100644 --- a/src/cpu/intel/model_65x/model_65x_init.c +++ b/src/cpu/intel/model_65x/model_65x_init.c @@ -35,11 +35,12 @@ * http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf */ static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0650 }, /* PII/Celeron, dA0/mdA0/A0 */ - { X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */ - { X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */ - { X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x0650, CPUID_EXACT_MATCH_MASK }, /* PII/Celeron, dA0/mdA0/A0 */ + { X86_VENDOR_INTEL, 0x0651, CPUID_EXACT_MATCH_MASK }, /* PII/Celeron, dA1/A1 */ + /* PII/Celeron/Xeon, dB0/mdB0/B0 */ + { X86_VENDOR_INTEL, 0x0652, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0653, CPUID_EXACT_MATCH_MASK }, /* PII/Xeon, dB1/B1 */ + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_67x/model_67x_init.c b/src/cpu/intel/model_67x/model_67x_init.c index d524705..0cc33f3 100644 --- a/src/cpu/intel/model_67x/model_67x_init.c +++ b/src/cpu/intel/model_67x/model_67x_init.c @@ -35,11 +35,11 @@ * http://download.intel.com/design/intarch/specupdt/24445358.pdf */ static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0671 }, - { X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */ - { X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */ + { X86_VENDOR_INTEL, 0x0671, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0672, CPUID_EXACT_MATCH_MASK }, /* PIII, kB0 */ + { X86_VENDOR_INTEL, 0x0673, CPUID_EXACT_MATCH_MASK }, /* PIII, kC0 */ - { 0, 0 }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_68x/model_68x_init.c b/src/cpu/intel/model_68x/model_68x_init.c index 0b5d454..aef66bd 100644 --- a/src/cpu/intel/model_68x/model_68x_init.c +++ b/src/cpu/intel/model_68x/model_68x_init.c @@ -45,13 +45,17 @@ * http://download.intel.com/design/intarch/specupdt/24530663.pdf */ static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0680 }, - { X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */ - { X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/ - { X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */ - { X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */ + { X86_VENDOR_INTEL, 0x0680, CPUID_EXACT_MATCH_MASK }, + /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */ + { X86_VENDOR_INTEL, 0x0681, CPUID_EXACT_MATCH_MASK }, + /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/ + { X86_VENDOR_INTEL, 0x0683, CPUID_EXACT_MATCH_MASK }, + /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */ + { X86_VENDOR_INTEL, 0x0686, CPUID_EXACT_MATCH_MASK }, + /* PIII/Celeron, cD0/D0/BD0/PD0 */ + { X86_VENDOR_INTEL, 0x068a, CPUID_EXACT_MATCH_MASK }, - { 0, 0 }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c index 0e54f93..485ac49 100644 --- a/src/cpu/intel/model_6bx/model_6bx_init.c +++ b/src/cpu/intel/model_6bx/model_6bx_init.c @@ -39,9 +39,10 @@ * http://download.intel.com/design/intarch/specupdt/24445358.pdf */ static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x06b1 }, /* Pentium III/Celeron, tA1/A1/FPA1 */ - { X86_VENDOR_INTEL, 0x06b4 }, /* Pentium III, tB1/FPB1 */ - { 0, 0 }, + /* Pentium III/Celeron, tA1/A1/FPA1 */ + { X86_VENDOR_INTEL, 0x06b1, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x06b4, CPUID_EXACT_MATCH_MASK }, /* Pentium III, tB1/FPB1 */ + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index bfa4a3e..ebcf263 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -120,10 +120,10 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x06e0 }, /* Intel Core Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06e8 }, /* Intel Core Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06ec }, /* Intel Core Solo/Core Duo */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x06e0, CPUID_EXACT_MATCH_MASK }, /* Intel Core Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06e8, CPUID_EXACT_MATCH_MASK }, /* Intel Core Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06ec, CPUID_EXACT_MATCH_MASK }, /* Intel Core Solo/Core Duo */ + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index ff64ab1..321c5d3 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -133,15 +133,16 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x06f0 }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06f2 }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06f6 }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06f7 }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06fa }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06fb }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x06fd }, /* Intel Core 2 Solo/Core Duo */ - { X86_VENDOR_INTEL, 0x10661 }, /* Intel Core 2 Celeron Conroe-L */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x06f0, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06f2, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06f6, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06f7, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06fa, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06fb, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + { X86_VENDOR_INTEL, 0x06fd, CPUID_EXACT_MATCH_MASK }, /* Intel Core 2 Solo/Core Duo */ + /* Intel Core 2 Celeron Conroe-L */ + { X86_VENDOR_INTEL, 0x10661, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c index f9afc6c..7cc7860 100644 --- a/src/cpu/intel/model_6xx/model_6xx_init.c +++ b/src/cpu/intel/model_6xx/model_6xx_init.c @@ -47,29 +47,33 @@ * http://download.intel.com/design/intarch/specupdt/24530663.pdf */ static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0611 }, /* Pentium Pro, B0 */ - { X86_VENDOR_INTEL, 0x0612 }, /* Pentium Pro, C0 */ - { X86_VENDOR_INTEL, 0x0616 }, /* Pentium Pro, sA0 */ - { X86_VENDOR_INTEL, 0x0617 }, /* Pentium Pro, sA1 */ - { X86_VENDOR_INTEL, 0x0619 }, /* Pentium Pro, sB1 */ + { X86_VENDOR_INTEL, 0x0611, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, B0 */ + { X86_VENDOR_INTEL, 0x0612, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, C0 */ + { X86_VENDOR_INTEL, 0x0616, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, sA0 */ + { X86_VENDOR_INTEL, 0x0617, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, sA1 */ + { X86_VENDOR_INTEL, 0x0619, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, sB1 */ - { X86_VENDOR_INTEL, 0x0633 }, /* PII, C0 */ - { X86_VENDOR_INTEL, 0x0634 }, /* PII, C1 */ + { X86_VENDOR_INTEL, 0x0633, CPUID_EXACT_MATCH_MASK }, /* PII, C0 */ + { X86_VENDOR_INTEL, 0x0634, CPUID_EXACT_MATCH_MASK }, /* PII, C1 */ - { X86_VENDOR_INTEL, 0x0660 }, /* Celeron, A0 */ - { X86_VENDOR_INTEL, 0x0665 }, /* Celeron, B0 */ - { X86_VENDOR_INTEL, 0x066a }, /* PII, mdxA0/dmmA0 + others */ + { X86_VENDOR_INTEL, 0x0660, CPUID_EXACT_MATCH_MASK }, /* Celeron, A0 */ + { X86_VENDOR_INTEL, 0x0665, CPUID_EXACT_MATCH_MASK }, /* Celeron, B0 */ + { X86_VENDOR_INTEL, 0x066a, CPUID_EXACT_MATCH_MASK }, /* PII, mdxA0/dmmA0 + others */ - { X86_VENDOR_INTEL, 0x0680 }, - { X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */ - { X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/ - { X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */ - { X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */ + { X86_VENDOR_INTEL, 0x0680, CPUID_EXACT_MATCH_MASK }, + /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */ + { X86_VENDOR_INTEL, 0x0681, CPUID_EXACT_MATCH_MASK }, + /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/ + { X86_VENDOR_INTEL, 0x0683, CPUID_EXACT_MATCH_MASK }, + /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */ + { X86_VENDOR_INTEL, 0x0686, CPUID_EXACT_MATCH_MASK }, + /* PIII/Celeron, cD0/D0/BD0/PD0 */ + { X86_VENDOR_INTEL, 0x068a, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, 0x06a0 }, /* PIII, A0 */ - { X86_VENDOR_INTEL, 0x06a1 }, /* PIII, A1 */ - { X86_VENDOR_INTEL, 0x06a4 }, /* PIII, B0 */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x06a0, CPUID_EXACT_MATCH_MASK }, /* PIII, A0 */ + { X86_VENDOR_INTEL, 0x06a1, CPUID_EXACT_MATCH_MASK }, /* PIII, A1 */ + { X86_VENDOR_INTEL, 0x06a4, CPUID_EXACT_MATCH_MASK }, /* PIII, B0 */ + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c index 2fc7360..5f27ea4 100644 --- a/src/cpu/intel/model_f2x/model_f2x_init.c +++ b/src/cpu/intel/model_f2x/model_f2x_init.c @@ -16,13 +16,13 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0f22 }, - { X86_VENDOR_INTEL, 0x0f24 }, - { X86_VENDOR_INTEL, 0x0f25 }, - { X86_VENDOR_INTEL, 0x0f26 }, - { X86_VENDOR_INTEL, 0x0f27 }, - { X86_VENDOR_INTEL, 0x0f29 }, - { 0, 0 }, + { X86_VENDOR_INTEL, 0x0f22, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0f24, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0f25, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0f26, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0f27, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0f29, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index bcbfdcf..1cf1ddb 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -18,8 +18,8 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0f34 }, /* Xeon */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x0f34, CPUID_EXACT_MATCH_MASK }, /* Xeon */ + { 0, 0, 0 }, }; static const struct cpu_driver model_f3x __cpu_driver = { diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index b495dee..73bb710 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -15,14 +15,14 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0f41 }, /* Xeon */ - { X86_VENDOR_INTEL, 0x0f43 }, /* Not tested */ - { X86_VENDOR_INTEL, 0x0f44 }, /* Not tested */ - { X86_VENDOR_INTEL, 0x0f47 }, - { X86_VENDOR_INTEL, 0x0f48 }, /* Not tested */ - { X86_VENDOR_INTEL, 0x0f49 }, /* Not tested */ - { X86_VENDOR_INTEL, 0x0f4a }, /* Not tested */ - { 0, 0 }, + { X86_VENDOR_INTEL, 0x0f41, CPUID_EXACT_MATCH_MASK }, /* Xeon */ + { X86_VENDOR_INTEL, 0x0f43, CPUID_EXACT_MATCH_MASK }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f44, CPUID_EXACT_MATCH_MASK }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f47, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x0f48, CPUID_EXACT_MATCH_MASK }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f49, CPUID_EXACT_MATCH_MASK }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f4a, CPUID_EXACT_MATCH_MASK }, /* Not tested */ + { 0, 0, 0 }, }; static const struct cpu_driver model_f4x __cpu_driver = { diff --git a/src/cpu/qemu-x86/qemu.c b/src/cpu/qemu-x86/qemu.c index f0cdb58..c0a3afe 100644 --- a/src/cpu/qemu-x86/qemu.c +++ b/src/cpu/qemu-x86/qemu.c @@ -12,8 +12,8 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_ANY, 0 }, - { 0, 0 }, + { X86_VENDOR_ANY, 0, 0 }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c index 78ca9e5..ddd4afe 100644 --- a/src/soc/amd/cezanne/cpu.c +++ b/src/soc/amd/cezanne/cpu.c @@ -47,8 +47,8 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, CEZANNE_A0_CPUID}, - { 0, 0 }, + { X86_VENDOR_AMD, CEZANNE_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver zen_2_3 __cpu_driver = { diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index 372ec4a3..c5a0ec4 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -50,8 +50,8 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, GLINDA_A0_CPUID}, /* TODO: Update for Glinda */ - { 0, 0 }, + { X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_EXACT_MATCH_MASK }, /* TODO: Update for Glinda */ + { 0, 0, 0 }, }; static const struct cpu_driver zen_2_3 __cpu_driver = { diff --git a/src/soc/amd/mendocino/cpu.c b/src/soc/amd/mendocino/cpu.c index fe5b054..7561b24 100644 --- a/src/soc/amd/mendocino/cpu.c +++ b/src/soc/amd/mendocino/cpu.c @@ -48,8 +48,8 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, MENDOCINO_A0_CPUID}, - { 0, 0 }, + { X86_VENDOR_AMD, MENDOCINO_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver zen_2_3 __cpu_driver = { diff --git a/src/soc/amd/phoenix/cpu.c b/src/soc/amd/phoenix/cpu.c index 68e440b..cba22e9 100644 --- a/src/soc/amd/phoenix/cpu.c +++ b/src/soc/amd/phoenix/cpu.c @@ -51,8 +51,8 @@ static struct cpu_device_id cpu_table[] = { /* TODO: Add Phoenix CPUID */ - { X86_VENDOR_AMD, PHOENIX2_A0_CPUID}, - { 0, 0 }, + { X86_VENDOR_AMD, PHOENIX2_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver zen_2_3 __cpu_driver = { diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c index 47c71ab..0ec753d 100644 --- a/src/soc/amd/picasso/cpu.c +++ b/src/soc/amd/picasso/cpu.c @@ -48,12 +48,12 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, RAVEN1_B0_CPUID}, - { X86_VENDOR_AMD, PICASSO_B0_CPUID }, - { X86_VENDOR_AMD, PICASSO_B1_CPUID }, - { X86_VENDOR_AMD, RAVEN2_A0_CPUID }, - { X86_VENDOR_AMD, RAVEN2_A1_CPUID }, - { 0, 0 }, + { X86_VENDOR_AMD, RAVEN1_B0_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, PICASSO_B0_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, PICASSO_B1_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, RAVEN2_A0_CPUID, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, RAVEN2_A1_CPUID, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver model_17 __cpu_driver = { diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index 8e44ede..a40b54b 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -60,9 +60,9 @@ }; static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_AMD, 0x660f01 }, - { X86_VENDOR_AMD, 0x670f00 }, - { 0, 0 }, + { X86_VENDOR_AMD, 0x660f01, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_AMD, 0x670f00, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver model_15 __cpu_driver = { diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index 7407415..c942b59 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -110,13 +110,13 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0 }, - { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 }, - { X86_VENDOR_INTEL, CPUID_GLK_A0 }, - { X86_VENDOR_INTEL, CPUID_GLK_B0 }, - { X86_VENDOR_INTEL, CPUID_GLK_R0 }, - { 0, 0 }, + { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_GLK_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_GLK_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_GLK_R0, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c index 1dbc3d7..db0c4ee 100644 --- a/src/soc/intel/baytrail/cpu.c +++ b/src/soc/intel/baytrail/cpu.c @@ -59,10 +59,10 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x30673 }, - { X86_VENDOR_INTEL, 0x30678 }, - { X86_VENDOR_INTEL, 0x30679 }, - { 0, 0 }, + { X86_VENDOR_INTEL, 0x30673, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x30678, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x30679, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c index b11007d..e45804f 100644 --- a/src/soc/intel/braswell/cpu.c +++ b/src/soc/intel/braswell/cpu.c @@ -59,10 +59,10 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x406c4 }, - { X86_VENDOR_INTEL, 0x406c3 }, - { X86_VENDOR_INTEL, 0x406c2 }, - { 0, 0 }, + { X86_VENDOR_INTEL, 0x406c4, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x406c3, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, 0x406c2, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 4636b3b..6d51f99 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -32,56 +32,56 @@ }; static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_1}, - { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_2}, - { X86_VENDOR_INTEL, CPUID_SKYLAKE_C0 }, - { X86_VENDOR_INTEL, CPUID_SKYLAKE_D0 }, - { X86_VENDOR_INTEL, CPUID_SKYLAKE_HQ0 }, - { X86_VENDOR_INTEL, CPUID_SKYLAKE_HR0 }, - { X86_VENDOR_INTEL, CPUID_KABYLAKE_G0 }, - { X86_VENDOR_INTEL, CPUID_KABYLAKE_H0 }, - { X86_VENDOR_INTEL, CPUID_KABYLAKE_Y0 }, - { X86_VENDOR_INTEL, CPUID_KABYLAKE_HA0 }, - { X86_VENDOR_INTEL, CPUID_KABYLAKE_HB0 }, - { X86_VENDOR_INTEL, CPUID_CANNONLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_CANNONLAKE_B0 }, - { X86_VENDOR_INTEL, CPUID_CANNONLAKE_C0 }, - { X86_VENDOR_INTEL, CPUID_CANNONLAKE_D0 }, - { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0 }, - { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 }, - { X86_VENDOR_INTEL, CPUID_GLK_A0 }, - { X86_VENDOR_INTEL, CPUID_GLK_B0 }, - { X86_VENDOR_INTEL, CPUID_GLK_R0 }, - { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_V0 }, - { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 }, - { X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 }, - { X86_VENDOR_INTEL, CPUID_COFFEELAKE_B0 }, - { X86_VENDOR_INTEL, CPUID_COFFEELAKE_P0 }, - { X86_VENDOR_INTEL, CPUID_COFFEELAKE_R0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_U_A0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_U_K0_S0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G1 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P1 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0 }, - { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 }, - { X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0 }, - { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0 }, - { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_L0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0 }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_J0 }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_Q0 }, - { 0, 0 }, + { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_1, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_2, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_SKYLAKE_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_SKYLAKE_D0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_SKYLAKE_HQ0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_SKYLAKE_HR0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_KABYLAKE_G0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_KABYLAKE_H0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_KABYLAKE_Y0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_KABYLAKE_HA0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_KABYLAKE_HB0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_CANNONLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_CANNONLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_CANNONLAKE_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_CANNONLAKE_D0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_GLK_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_GLK_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_GLK_R0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_V0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COFFEELAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COFFEELAKE_P0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COFFEELAKE_R0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_U_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_U_K0_S0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G1, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P1, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_L0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_J0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_Q0, CPUID_EXACT_MATCH_MASK }, + { 0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 8b5fb40..210aefe 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -122,10 +122,11 @@ }; static const struct cpu_device_id cpu_table[] = { - {X86_VENDOR_INTEL, - CPUID_DENVERTON_A0_A1}, /* Denverton-NS A0/A1 CPUID */ - {X86_VENDOR_INTEL, CPUID_DENVERTON_B0}, /* Denverton-NS B0 CPUID */ - {0, 0}, + /* Denverton-NS A0/A1 CPUID */ + {X86_VENDOR_INTEL, CPUID_DENVERTON_A0_A1, CPUID_EXACT_MATCH_MASK }, + /* Denverton-NS B0 CPUID */ + {X86_VENDOR_INTEL, CPUID_DENVERTON_B0, CPUID_EXACT_MATCH_MASK }, + {0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c index 8a7dd2a..bf26f7c 100644 --- a/src/soc/intel/xeon_sp/cpx/cpu.c +++ b/src/soc/intel/xeon_sp/cpx/cpu.c @@ -127,9 +127,9 @@ }; static const struct cpu_device_id cpu_table[] = { - {X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A0}, - {X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A1}, - {0, 0}, + {X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A0, CPUID_EXACT_MATCH_MASK }, + {X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A1, CPUID_EXACT_MATCH_MASK }, + {0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c index 24984e1..2656b9a 100644 --- a/src/soc/intel/xeon_sp/skx/cpu.c +++ b/src/soc/intel/xeon_sp/skx/cpu.c @@ -148,12 +148,12 @@ static const struct cpu_device_id cpu_table[] = { /* Skylake-SP A0/A1 CPUID 0x506f0*/ - {X86_VENDOR_INTEL, CPUID_SKYLAKE_SP_A0_A1}, + {X86_VENDOR_INTEL, CPUID_SKYLAKE_SP_A0_A1, CPUID_EXACT_MATCH_MASK }, /* Skylake-SP B0 CPUID 0x506f1*/ - {X86_VENDOR_INTEL, CPUID_SKYLAKE_SP_B0}, + {X86_VENDOR_INTEL, CPUID_SKYLAKE_SP_B0, CPUID_EXACT_MATCH_MASK }, /* Skylake-SP 4 CPUID 0x50654*/ - {X86_VENDOR_INTEL, CPUID_SKYLAKE_SP_4}, - {0, 0}, + {X86_VENDOR_INTEL, CPUID_SKYLAKE_SP_4, CPUID_EXACT_MATCH_MASK }, + {0, 0, 0 }, }; static const struct cpu_driver driver __cpu_driver = { -- To view, visit https://review.coreboot.org/c/coreboot/+/72847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0540b514ca42591c0d3468307a82b5612585f614 Gerrit-Change-Number: 72847 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/x86/include/cpu: retype device field in cpu_device_id
by Felix Held (Code Review) 06 Feb '23

06 Feb '23

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72846 ) Change subject: arch/x86/include/cpu: retype device field in cpu_device_id ...................................................................... arch/x86/include/cpu: retype device field in cpu_device_id In identify_cpu the uint32_t return value of cpu_get_cpuid gets written to this field. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ic54f73dcd3496a5ad85291b9b9586bc740b734d5 --- M src/arch/x86/include/arch/cpu.h 1 file changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/72846/1 diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 18bc961..26315eb 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -113,7 +113,7 @@ struct cpu_device_id { unsigned int vendor; - unsigned int device; + uint32_t device; }; struct cpu_driver { -- To view, visit https://review.coreboot.org/c/coreboot/+/72846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic54f73dcd3496a5ad85291b9b9586bc740b734d5 Gerrit-Change-Number: 72846 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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coreboot-gerrit February 2023