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Change subject: mb/intel/mtlrvp: Enable WWAN ACPI
......................................................................
Patch Set 7: Code-Review+1
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Change subject: nb/intel/haswell/pcie.c: Make UBSAN shut up
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72806/comment/b6d1a1c3_86f685d8
PS1, Line 7: nb/intel/haswell/pcie.c: Make UBSAN shut up
> But it fixes undefined behavior, so maybe: […]
You can't fix undefined behavior, but you can avoid it...
IMO "fix" is used wrong most of the time in commit messages.
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Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71945 )
Change subject: soc/intel/xeon_sp: add ebg (Emmitsburg PCH) directory
......................................................................
Patch Set 11:
(1 comment)
File src/soc/intel/xeon_sp/ebg/include/soc/pmc.h:
https://review.coreboot.org/c/coreboot/+/71945/comment/bf8466da_520545fa
PS10, Line 1: /* SPDX-License-Identifier: GPL-2.0-or-later */
> This file should be re-organized, check [CB:72399]
Ack
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Change subject: mb/dell: Add Latitude E6400
......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/dell/e6400/cmos.layout:
https://review.coreboot.org/c/coreboot/+/59704/comment/b4935ab4_bf8e96bb
PS10, Line 38: 1152 128 r 0 vbnv
> VBNV is deprecated
Done. Also cleaned up unused enums. By the way, do you have a reference for that deprecation? I couldn't find any commit on Gerrit relating to that
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Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59704
to look at the new patch set (#11).
Change subject: mb/dell: Add Latitude E6400
......................................................................
mb/dell: Add Latitude E6400
Mainboard name is Compal JBL00. This is based on the GM45/ICH9M chipset
and uses DDR2 RAM. The EC is a SMSC MEC5035 which has internal flash, so
there's no issue about making sure to include the EC firmware in the
BIOS region. This only supports the variant with integrated graphics
only, the version with a discrete Nvidia Quadro NVS 160M is not
supported.
This port was based on the Lenovo T400 port.
Working:
- USB EHCI debug (lower USB port on right side)
- Keyboard
- Touchpad/trackpoint
- VGA
- Displayport
- ExpressCard
- Audio
- Ethernet
- mPCIe WiFi
- mPCIe Bluetooth (uses USB)
Not working:
- Brightness hotkeys
- Physical Wireless switch
- SD card slot: Linux outputs an "irq 18: nobody cared" message when
inserting a card, after which it disables the IRQ
Unknown/untested:
- Dock
- Smartcard (slot and contactless)
- Firewire
- eSATA
- TPM
- Battery (my battery is at the end of its lifespan)
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
Change-Id: I516ebbf4390a3f6d242050da8d35dc267b8b3a28
---
A src/mainboard/dell/e6400/Kconfig
A src/mainboard/dell/e6400/Kconfig.name
A src/mainboard/dell/e6400/Makefile.inc
A src/mainboard/dell/e6400/acpi/ec.asl
A src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
A src/mainboard/dell/e6400/acpi/superio.asl
A src/mainboard/dell/e6400/blc.c
A src/mainboard/dell/e6400/board_info.txt
A src/mainboard/dell/e6400/bootblock.c
A src/mainboard/dell/e6400/cmos.default
A src/mainboard/dell/e6400/cmos.layout
A src/mainboard/dell/e6400/cstates.c
A src/mainboard/dell/e6400/data.vbt
A src/mainboard/dell/e6400/devicetree.cb
A src/mainboard/dell/e6400/dsdt.asl
A src/mainboard/dell/e6400/gma-mainboard.ads
A src/mainboard/dell/e6400/gpio.c
A src/mainboard/dell/e6400/hda_verb.c
A src/mainboard/dell/e6400/mainboard.c
A src/mainboard/dell/e6400/romstage.c
20 files changed, 649 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/59704/11
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Change subject: ec/dell: Add support for the SMSC MEC5035
......................................................................
Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59703/comment/08a5101f_e6ffe2dd
PS9, Line 16: Part of this code is based on unmerged MEC5055 code written by Iru Cai.
> Was it ever public?
Yes, see CB:44975: (ec: Add support for MEC5055 for Dell laptops)
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Change subject: util/abuild: Add flags to allow abuild to skip boards
......................................................................
Patch Set 3: Code-Review+2
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Change subject: sb/intel/lynxpoint: Add PCI DIDs for 9 series PCHs
......................................................................
Patch Set 3: Code-Review+1
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Change subject: ec/dell: Add support for the SMSC MEC5035
......................................................................
Patch Set 9: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59703/comment/4a71706d_e44c3bb7
PS9, Line 16: Part of this code is based on unmerged MEC5055 code written by Iru Cai.
Was it ever public?
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