coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

1 participants
5082 discussions

[M] Change in coreboot[master]: src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic
by Jérémy Compostella (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Cliff Huang, Tarun Tuli, Subrata Banik, Nick Vaccaro. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72421 ) Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6f1e7a5b3e9fd0ea00e1e5b54058a14c6e9e09e Gerrit-Change-Number: 72421 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cordelia Huang <cordelia1396(a)gmail.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 07 Feb 2023 19:32:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: amdfwtool: Allow the location to be a relative address
by Fred Reitberger (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bao Zheng, Martin L Roth, ritul guru, Zheng Bao. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69856 ) Change subject: amdfwtool: Allow the location to be a relative address ...................................................................... Patch Set 19: (1 comment) File util/amdfwtool/amdfwtool.c: https://review.coreboot.org/c/coreboot/+/69856/comment/47901cae_3daceba3 PS19, Line 2506: if (ctx.rom_size <= 0x800000) { : fprintf(stderr, "Error: Invalid Directory location.\n"); : fprintf(stderr, "%x is only for 8M image size.", efs_location); : } This is printing an error on 8M boards now, but does not return an error and completes the build. The if should probably go back to `ctx.rom_size != 0x800000` and add `return 1;` similar to the below case. The valid 4M locations are: `0x3A0000`, `0x320000`, `0x220000`, and `0x020000` The last one is already covered by the first group of cases. Probably best to make these their own group of cases and check `if (ctx.rom_size != 0x400000)` like the 8M case does. -- To view, visit https://review.coreboot.org/c/coreboot/+/69856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4308ec9ea05a87329aba0b409508c79ebf42325c Gerrit-Change-Number: 69856 Gerrit-PatchSet: 19 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Tue, 07 Feb 2023 18:47:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic
by Cliff Huang (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Tarun Tuli, Subrata Banik, Jérémy Compostella, Nick Vaccaro. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72421 ) Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic ...................................................................... Patch Set 3: (2 comments) File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/72421/comment/fc511434_4c704287 PS2, Line 264: /* for enable pin: > This is clearly not a one liner comment and therefore the syntax you used is incorrect. […] Thanks for restructuring this! https://review.coreboot.org/c/coreboot/+/72421/comment/01872c41_be90fc31 PS2, Line 286: acpigen_write_xor(LOCAL0_OP, 1, LOCAL0_OP); > Can't we use `acpigen_write_not(LOCAL0_OP, LOCAL0_OP)` instead ? good point. only simple 'negate' is needed. -- To view, visit https://review.coreboot.org/c/coreboot/+/72421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6f1e7a5b3e9fd0ea00e1e5b54058a14c6e9e09e Gerrit-Change-Number: 72421 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cordelia Huang <cordelia1396(a)gmail.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 07 Feb 2023 18:16:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic
by Cliff Huang (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Cliff Huang, Tarun Tuli, Subrata Banik, Nick Vaccaro. Hello Bora Guvendik, build bot (Jenkins), Hannah Williams, Tarun Tuli, Subrata Banik, Jérémy Compostella, Nick Vaccaro, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72421 to look at the new patch set (#3). Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic ...................................................................... src/soc/intel/common/block/pcie/rtd3: Fix root port _STA logic When enable_gpio is used as active low output, the _STA returns incorrect value. Also, simply the logic for _STA method. When enable pin is used for _STA: | polarity | tx value| get_tx_gpio() | State | | active high | 0 | 0 | 0 | | active high | 1 | 1(active) | 1 | | active low | 0 | 1(active) | 1 | | active low | 1 | 0 | 0 | When reset pin is used for _STA: | polarity | tx value| get_tx_gpio() | State | | active high | 0 | 0 | 1 | | active high | 1 | 1(active) | 0 | | active low | 0 | 1(active) | 0 | | active low | 1 | 0 | 1 | Generated _STA method: Ex: for using active low power enable GPIO pin GPPC_H17: Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = \_SB.PCI0.GTXS (0x5C) Local0 ^= One Return (Local0) } TEST=Check the SSDT when booted to OS. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Ie6f1e7a5b3e9fd0ea00e1e5b54058a14c6e9e09e --- M src/soc/intel/common/block/pcie/rtd3/rtd3.c 1 file changed, 70 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/72421/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/72421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6f1e7a5b3e9fd0ea00e1e5b54058a14c6e9e09e Gerrit-Change-Number: 72421 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cordelia Huang <cordelia1396(a)gmail.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic
by Jérémy Compostella (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Anil Kumar K, Cliff Huang. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72826 ) Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ea2e78e98d334a90294ee6cdd14ae2de9b9b62 Gerrit-Change-Number: 72826 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Comment-Date: Tue, 07 Feb 2023 18:13:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/rex: Enable stylus support
by Dinesh Gehlot (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal. Hello Tarun Tuli, Subrata Banik, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71820 to look at the new patch set (#5). Change subject: mb/google/rex: Enable stylus support ...................................................................... mb/google/rex: Enable stylus support This patch enables stylus support for stylus device. Stylus is not a wake up source for rex. "GPP_D08" is mapped as irq source. BUG=b:264162937 Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: I84a71aa664698e105b738f8680d0a4751ca1fc72 --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/71820/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/71820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a71aa664698e105b738f8680d0a4751ca1fc72 Gerrit-Change-Number: 71820 Gerrit-PatchSet: 5 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: mb/google/rex: Enable stylus support
by Dinesh Gehlot (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71820 ) Change subject: mb/google/rex: Enable stylus support ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/71820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a71aa664698e105b738f8680d0a4751ca1fc72 Gerrit-Change-Number: 71820 Gerrit-PatchSet: 3 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 07 Feb 2023 17:48:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/rex: Enable stylus support
by Dinesh Gehlot (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71820 ) Change subject: mb/google/rex: Enable stylus support ...................................................................... Patch Set 3: (1 comment) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/71820/comment/d2bf1e39_99992ea9 PS1, Line 7: support for proto 1 > just add support, doesn't make sense to call if this is for Proto 1 or not Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/71820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a71aa664698e105b738f8680d0a4751ca1fc72 Gerrit-Change-Number: 71820 Gerrit-PatchSet: 3 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 07 Feb 2023 17:48:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic
by Cliff Huang (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Anil Kumar K, Jérémy Compostella. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72826 ) Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72826/comment/74efa1ef_4e606408 PS3, Line 16: aslo > also Done -- To view, visit https://review.coreboot.org/c/coreboot/+/72826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ea2e78e98d334a90294ee6cdd14ae2de9b9b62 Gerrit-Change-Number: 72826 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Tue, 07 Feb 2023 17:45:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic
by Cliff Huang (Code Review) 07 Feb '23

07 Feb '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Anil Kumar K, Cliff Huang. Hello Bora Guvendik, build bot (Jenkins), Hannah Williams, Anil Kumar K, Jérémy Compostella, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72826 to look at the new patch set (#4). Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic ...................................................................... src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic _ON() calls _STA() at the beginning. If _STA() indicates the device is ON, it exits immediately. Before exiting, it needs to check if it was scheduled to be skipped first. NOTE: RTD3 provides a way to skip _OFF() and _ON() methods following by a device reset such as WWAN device. When such device calls its _RST(), it increments OFSK. When the following _OFF() is called, it was scheduled to skip, it will also increments ONSK. Similarly, when the following _ON() is called, it checks if the previous _OFF was skipped or not. If skipped, it needs to do the same. In normal suspend/resume cases, these two variables remains '0'. No _OFF() and _ON() calls are skipped. entire generated code: Method (_ON, 0, Serialized) // _ON_: Power On { Local0 = \_SB.PCI0.RP01.RTD3._STA () If ((Local0 == One)) { If ((ONSK > Zero)) { ONSK-- } Return (One) } If ((ONSK == Zero)) { Acquire (\_SB.PCI0.R3MX, 0xFFFF) EMPG = Zero Local7 = 0x06 While ((Local7 > Zero)) { If ((AMPG == Zero)) { Break } Sleep (0x10) Local7-- } Release (\_SB.PCI0.R3MX) \_SB.PCI0.PMC.IPCS (0xAC, Zero, 0x10, 0x00000020, 0x00000020, 0x00000020, 0x00000020) \_SB.PCI0.STXS (0x015E) If ((NCB7 == One)) { L23R = One Local7 = 0x14 While ((Local7 > Zero)) { If ((L23R == Zero)) { Break } Sleep (0x10) Local7-- } NCB7 = Zero Local7 = 0x08 While ((Local7 > Zero)) { If ((LASX == One)) { Break } Sleep (0x10) Local7-- } } } Else { ONSK-- } } BUG=b:241850118 TEST=Use above functions and check the generated SSDT table after OS boot. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Id1ea2e78e98d334a90294ee6cdd14ae2de9b9b62 --- M src/soc/intel/common/block/pcie/rtd3/rtd3.c 1 file changed, 103 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/72826/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/72826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ea2e78e98d334a90294ee6cdd14ae2de9b9b62 Gerrit-Change-Number: 72826 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2023