coreboot-gerrit December 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: [test][Do not merge] Revert "arch/x86: Reduce max phys address size f...
by Jérémy Compostella (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Ronak Kanabar. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79399?usp=email ) Change subject: [test][Do not merge] Revert "arch/x86: Reduce max phys address size for Intel TME capable SoCs" ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: Investigation in progress. -- To view, visit https://review.coreboot.org/c/coreboot/+/79399?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If4249b65f4294b38b0721d1a3ba577e87766f547 Gerrit-Change-Number: 79399 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:23:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/common: Move PCIe CLKREQ programming under fsp
by Martin L Roth (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79016?usp=email ) Change subject: soc/amd/common: Move PCIe CLKREQ programming under fsp ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79016?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I87b53d092ddc367b134c25949f9da7670a6a1d88 Gerrit-Change-Number: 79016 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:23:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: vendorcode/amd/opensil: Add initial setup and API calls
by Varshit Pandya (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Arthur Heymans, Paul Menzel. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76515?usp=email ) Change subject: vendorcode/amd/opensil: Add initial setup and API calls ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76515/comment/bec60b79_8b3db941 : PS8, Line 13: > Were you able to test it? did a build test -- To view, visit https://review.coreboot.org/c/coreboot/+/76515?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4833a5a86034a13e6be102a6b68c3bb54108bc9a Gerrit-Change-Number: 76515 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:15:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/spi: Add ISSI IS25WP256D flash
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Maximilian Brune. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79369?usp=email ) Change subject: drivers/spi: Add ISSI IS25WP256D flash ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79369/comment/dee49af9_ecf24a82 : PS1, Line 8: Please document the datasheet name and revision. -- To view, visit https://review.coreboot.org/c/coreboot/+/79369?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I655776258cbcf464becf38cbb5045cda5bca711c Gerrit-Change-Number: 79369 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:08:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/spi: Add ISSI IS25WP256D flash
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Maximilian Brune. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79369?usp=email ) Change subject: drivers/spi: Add ISSI IS25WP256D flash ...................................................................... Patch Set 1: (1 comment) File src/drivers/spi/issi.c: https://review.coreboot.org/c/coreboot/+/79369/comment/4a2f12c6_c9567903 : PS1, Line 28: //TODO Why? Add a space? -- To view, visit https://review.coreboot.org/c/coreboot/+/79369?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I655776258cbcf464becf38cbb5045cda5bca711c Gerrit-Change-Number: 79369 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:08:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/alderlake: add pcie modphy settings
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

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[M] Change in coreboot[main]: soc/intel/alderlake: add pcie modphy settings
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Jamie Chen, Kane Chen, Nick Vaccaro, Simon Yang, Subrata Banik. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79370?usp=email ) Change subject: soc/intel/alderlake: add pcie modphy settings ...................................................................... Patch Set 2: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79370/comment/1bda0ece_c9f35461 : PS2, Line 7: add pcie modphy settings Allow to tune PCIe modphy settings https://review.coreboot.org/c/coreboot/+/79370/comment/066f044a_2cfea26f : PS2, Line 8: Please start by summarizing the problem, and why tuning PCIe modphy is useful. https://review.coreboot.org/c/coreboot/+/79370/comment/c4a2b48d_3af5be24 : PS2, Line 14: enable enabled File src/soc/intel/alderlake/include/soc/pcie_modphy.h: https://review.coreboot.org/c/coreboot/+/79370/comment/4cdd0834_fa95246c : PS2, Line 7: /* TX Output Downscale Amplitude Adjustment */ : bool tx_gen1_downscale_amp_override; : uint8_t tx_gen1_downscale_amp; : /* TX Output Downscale Amplitude Adjustment */ : bool tx_gen2_downscale_amp_override; : uint8_t tx_gen2_downscale_amp; : /* TX Output Downscale Amplitude Adjustment */ The three comments are identical? -- To view, visit https://review.coreboot.org/c/coreboot/+/79370?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I08bb2236ac3f8fd8b5e286a9543519b9456d93c6 Gerrit-Change-Number: 79370 Gerrit-PatchSet: 2 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:06:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: vendorcode/amd/opensil: Add initial setup and API calls
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Arthur Heymans, Varshit Pandya. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76515?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: vendorcode/amd/opensil: Add initial setup and API calls ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76515/comment/17e7434b_91989005 : PS8, Line 13: Were you able to test it? -- To view, visit https://review.coreboot.org/c/coreboot/+/76515?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4833a5a86034a13e6be102a6b68c3bb54108bc9a Gerrit-Change-Number: 76515 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:01:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brox: Generate RAM IDs
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Ivy Jian, Karthik Ramasubramanian. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79392?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/brox: Generate RAM IDs ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79392/comment/06ecf722_1162600a : PS2, Line 7: Generate RAM IDs … for two modules https://review.coreboot.org/c/coreboot/+/79392/comment/3df67523_dea2faf9 : PS2, Line 11: H9JCNNNBK3MLYR-N6E 0 (0000) : MT62F1G32D4DR-031 WT:B 1 (0001) Please add the vendors. -- To view, visit https://review.coreboot.org/c/coreboot/+/79392?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib17f26a310435e37088191594863a645aa751440 Gerrit-Change-Number: 79392 Gerrit-PatchSet: 2 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:00:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/brox: Fix memory config
by Paul Menzel (Code Review) 05 Dec '23

05 Dec '23

Attention is currently required from: Shelley Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79355?usp=email ) Change subject: mb/google/brox: Fix memory config ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/brox/variants/baseboard/brox/memory.c: https://review.coreboot.org/c/coreboot/+/79355/comment/e8c21a5d_39211472 : PS7, Line 13: .lpx_dq_map = { : .ddr0 = { : .dq0 = { 4, 7, 5, 6, 0, 1, 2, 3, }, : .dq1 = { 8, 11, 9, 10, 13, 14, 15, 12, }, : }, : .ddr1 = { : .dq0 = { 1, 2, 3, 0, 6, 4, 7, 5, }, : .dq1 = { 13, 15, 12, 14, 8, 11, 9, 10, }, : }, : .ddr2 = { : .dq0 = { 0, 3, 2, 1, 6, 5, 7, 4, }, : .dq1 = { 14, 12, 15, 13, 8, 10, 9, 11, }, : }, : .ddr3 = { : .dq0 = { 5, 7, 4, 6, 2, 0, 1, 3, }, : .dq1 = { 10, 9, 11, 8, 12, 15, 13, 14, }, : }, : .ddr4 = { : .dq0 = { 4, 6, 5, 7, 3, 2, 1, 0, }, : .dq1 = { 8, 11, 9, 10, 14, 13, 15, 12, }, : }, : .ddr5 = { : .dq0 = { 2, 1, 3, 0, 6, 4, 7, 5, }, : .dq1 = { 13, 15, 12, 14, 8, 11, 9, 10, }, : }, : .ddr6 = { : .dq0 = { 14, 12, 15, 13, 8, 11, 10, 9, }, : .dq1 = { 1, 2, 3, 0, 5, 6, 7, 4, }, : }, : .ddr7 = { : .dq0 = { 3, 6, 2, 7, 5, 0, 1, 4, }, : .dq1 = { 9, 8, 14, 15, 10, 12, 13, 11, }, : }, : }, : : /* DQS CPU<>DRAM map */ : .lpx_dqs_map = { : .ddr0 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr1 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr2 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr3 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr4 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr5 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr6 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr7 = { .dqs0 = 0, .dqs1 = 1 } : }, : : .lp5x_config = { : .ccc_config = 0x99, : }, Where did you get these values from? -- To view, visit https://review.coreboot.org/c/coreboot/+/79355?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17615cda7df10e73e49fb49f736728787ef7625d Gerrit-Change-Number: 79355 Gerrit-PatchSet: 7 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Comment-Date: Tue, 05 Dec 2023 16:00:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2023