coreboot-gerrit December 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: security/tpm: Retrieve factory configuration for device w/ Google TPM
by Subrata Banik (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Christian Walter, Nick Vaccaro, Paul Menzel, Paz Zcharya, Shelley Chen, Tim Van Patten. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79736?usp=email ) Change subject: security/tpm: Retrieve factory configuration for device w/ Google TPM ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79736/comment/7e84cba1_973f1430 : PS4, Line 9: factory configuration data > > This is currently encoded in 8 bits? > > The factory config space is a 64-bit, one-time programmable. > For the unprovisioned one, the read will be 0x0. so far we are only using 8-bits of the factory config (out of 64-bits) -- To view, visit https://review.coreboot.org/c/coreboot/+/79736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifd0e850770152a03aa46d7f8bbb76f7520a59081 Gerrit-Change-Number: 79736 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Paz Zcharya <pazz(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paz Zcharya <pazz(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Comment-Date: Thu, 28 Dec 2023 15:23:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: util: add smmstoretool for editing SMMSTORE
by Michał Żygowski (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Michał Kopeć, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79080?usp=email ) Change subject: util: add smmstoretool for editing SMMSTORE ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Can't compile it under bare metal Ubuntu 22.04: https://paste.dasharo.com/?58211b02ba2c02a2#7Qhmr8JxwgGr5Sk1ozFkXyTp7XrhmuX… -- To view, visit https://review.coreboot.org/c/coreboot/+/79080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c1c06f1d0c39c13b5be76a3070f09b715aca6e0 Gerrit-Change-Number: 79080 Gerrit-PatchSet: 6 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Filip Lewiński Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Thu, 28 Dec 2023 14:54:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: [TEST-ONLY] MTL RMT Enable
by Ravishankar Sarawadi (Code Review) 28 Dec '23

28 Dec '23

Ravishankar Sarawadi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79741?usp=email ) Change subject: [TEST-ONLY] MTL RMT Enable ...................................................................... [TEST-ONLY] MTL RMT Enable Change-Id: I08634aea5582f963b5ecde3476b8c9b7d9445fdc Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> --- M src/soc/intel/meteorlake/romstage/fsp_params.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/79741/1 diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 4842c19..5a254e0 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -161,11 +161,11 @@ } } - m_cfg->RMT = config->rmt; + m_cfg->RMT = 1; m_cfg->RMC = 0; m_cfg->MarginLimitCheck = 0; /* Enable MRC Fast Boot */ - m_cfg->MrcFastBoot = 1; + m_cfg->MrcFastBoot = 0; m_cfg->LowerBasicMemTestSize = config->lower_basic_mem_test_size; } -- To view, visit https://review.coreboot.org/c/coreboot/+/79741?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I08634aea5582f963b5ecde3476b8c9b7d9445fdc Gerrit-Change-Number: 79741 Gerrit-PatchSet: 1 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-MessageType: newchange

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[XL] Change in coreboot[main]: util: add smmstoretool for editing SMMSTORE
by Michał Żygowski (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Michał Kopeć, Sergii Dmytruk. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79080?usp=email ) Change subject: util: add smmstoretool for editing SMMSTORE ...................................................................... Patch Set 6: (1 comment) File util/smmstoretool/Makefile: https://review.coreboot.org/c/coreboot/+/79080/comment/24bea735_5fa3c429 : PS6, Line 8: CC := $(CROSS_COMPILE)gcc This is rather an utility, so it should have something like: HOSTCC ?= $(CC) -- To view, visit https://review.coreboot.org/c/coreboot/+/79080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c1c06f1d0c39c13b5be76a3070f09b715aca6e0 Gerrit-Change-Number: 79080 Gerrit-PatchSet: 6 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Filip Lewiński Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Thu, 28 Dec 2023 14:10:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: Documentation: Add Protectli to ships-with-coreboot hw list
by Michał Żygowski (Code Review) 28 Dec '23

28 Dec '23

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79215?usp=email ) Change subject: Documentation: Add Protectli to ships-with-coreboot hw list ...................................................................... Documentation: Add Protectli to ships-with-coreboot hw list Change-Id: Iff642f5122e7132d96177f2ed1680ece42aac095 Signed-off-by: Filip Lewiński <filip.lewinski(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79215 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M Documentation/distributions.md 1 file changed, 10 insertions(+), 0 deletions(-) Approvals: Michał Żygowski: Looks good to me, approved build bot (Jenkins): Verified diff --git a/Documentation/distributions.md b/Documentation/distributions.md index 1134970..5b2c443 100644 --- a/Documentation/distributions.md +++ b/Documentation/distributions.md @@ -43,6 +43,16 @@ third party, [3mdeb](https://3mdeb.com). They provide current and tested firmware binaries on [GitHub](https://pcengines.github.io). +### Protectli + +[Protectli](https://protectli.com) is dedicated to providing reliable, +cost-effective, and secure computer equipment with coreboot-based firmware +tailored for their hardware. It comes with the [Dasharo](#dasharo) +firmware, maintained by [3mdeb](https://3mdeb.com/). Protectli hardware has +verified support for many popular operating systems, such as Linux distributions, +FreeBSD, and Windows. Support includes Debian, Ubuntu, OPNsense, pfSense, +ProxMox VE, VMware ESXi, Windows 10 and 11, and many more. + ### Purism [Purism](https://www.puri.sm) sells laptops with a focus on user privacy and -- To view, visit https://review.coreboot.org/c/coreboot/+/79215?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff642f5122e7132d96177f2ed1680ece42aac095 Gerrit-Change-Number: 79215 Gerrit-PatchSet: 7 Gerrit-Owner: Filip Lewiński Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[L] Change in coreboot[main]: mainboard: add Dell Latitude E7240
by Arthur Heymans (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Iru Cai. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79746?usp=email ) Change subject: mainboard: add Dell Latitude E7240 ...................................................................... Patch Set 2: (1 comment) File src/mainboard/dell/e7240/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79746/comment/0d1b049c_668d3562 : PS2, Line 66: device pci 1f.0 on end # LPC bridge Did you try adding the EC here like the dell/e6400? That seems to call a function that initialized the touchpad. -- To view, visit https://review.coreboot.org/c/coreboot/+/79746?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6933bdbcc8d0bbb85d62657624740266284ac71c Gerrit-Change-Number: 79746 Gerrit-PatchSet: 2 Gerrit-Owner: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Comment-Date: Thu, 28 Dec 2023 13:20:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable SSE2 accelerated RSA sign. verification
by Subrata Banik (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Tarun. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79291?usp=email ) Change subject: soc/intel/meteorlake: Enable SSE2 accelerated RSA sign. verification ...................................................................... Patch Set 8: (1 comment) Patchset: PS4: > Done. Cf. https://review.coreboot.org/c/coreboot/+/79685 unfortunately, I don't see any savings after picking this cl. -- To view, visit https://review.coreboot.org/c/coreboot/+/79291?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I382e62a765dbf2027c4ac54d6eb19a9542a8c302 Gerrit-Change-Number: 79291 Gerrit-PatchSet: 8 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 28 Dec 2023 12:56:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: device/pciexp_device.c: Fix setting Max Payload Size
by Michał Żygowski (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Krystian Hebel, Kyösti Mälkki, Nico Huber, Patrick Rudolph. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77338?usp=email ) Change subject: device/pciexp_device.c: Fix setting Max Payload Size ...................................................................... Patch Set 11: (2 comments) File src/device/pciexp_device.c: https://review.coreboot.org/c/coreboot/+/77338/comment/ab4c1e35_0b1feedf : PS10, Line 645: pciexp_limit_max_payload_ctl(dev->bus->dev, pciexp_configured_max_payload(dev), cap); > > pciexp_scan_bus discovers devices from the root towards end devices. […] Now traversing the topology in a loop and updating the Max Payload Size up to the root port each time new downstream device is discovered. https://review.coreboot.org/c/coreboot/+/77338/comment/ad6722f9_2dc1e7db : PS10, Line 709: pciexp_configure_max_payload > I have added another print: […] Finally figured out how it should work. Now traversing the topology in a loop and updating the Max Payload Size up to the root port each time new downstream device is discovered. -- To view, visit https://review.coreboot.org/c/coreboot/+/77338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24386dc208363b7d94fea46dec25c231a3968225 Gerrit-Change-Number: 77338 Gerrit-PatchSet: 11 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 28 Dec 2023 12:47:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: device/pciexp_device.c: Fix setting Max Payload Size
by Michał Żygowski (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Krystian Hebel, Kyösti Mälkki, Nico Huber, Patrick Rudolph. Hello Angel Pons, Arthur Heymans, Felix Held, Kyösti Mälkki, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77338?usp=email to look at the new patch set (#11). The following approvals got outdated and were removed: Code-Review+2 by Kyösti Mälkki, Verified+1 by build bot (Jenkins) Change subject: device/pciexp_device.c: Fix setting Max Payload Size ...................................................................... device/pciexp_device.c: Fix setting Max Payload Size Current implementation assumes that the endpoint device is connected directly to the PCIe Root Port, which does not always have to be true. In a case where there is a PCIe switch between the endpoint and the Root Port the Max Payload Size capability may differ across these devices and coreboot will not set a correct Max Payload size. This results in PCIe device malfunction in pre-OS environment, e.g. if the Ethernet NICs are connected behind a PCIe switch, iPXE fails to obtain the DHCP configuration. Fix this by traversing the topology and programming the highest common Max Payload Size in the given PCIe device chain. TEST=Perform successful dhcp command in iPXE on the NIC connected to the PCIe Root Port via ASMedia ASM1806 PCIe Switch and a NIC connected directly to the PCIe Root Port. Change-Id: I24386dc208363b7d94fea46dec25c231a3968225 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/device/pciexp_device.c M src/include/device/device.h 2 files changed, 62 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/77338/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/77338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24386dc208363b7d94fea46dec25c231a3968225 Gerrit-Change-Number: 77338 Gerrit-PatchSet: 11 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: security/tpm: Retrieve factory configuration for device w/ Google TPM
by Subrata Banik (Code Review) 28 Dec '23

28 Dec '23

Attention is currently required from: Christian Walter, Nick Vaccaro, Paul Menzel, Paz Zcharya, Shelley Chen, Tim Van Patten. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79736?usp=email ) Change subject: security/tpm: Retrieve factory configuration for device w/ Google TPM ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79736/comment/746c3cde_db4d5fdb : PS4, Line 9: factory configuration data > This is currently encoded in 8 bits? The factory config space is a 64-bit, one-time programmable. For the unprovisioned one, the read will be 0x0. File src/security/tpm/tss/vendor/cr50/cr50.c: https://review.coreboot.org/c/coreboot/+/79736/comment/cc26deaa_fa6f433b : PS4, Line 186: printk(BIOS_INFO, "Reading factory config\n"); > Should the result be printed at the end? i don't feel that is necessary (similar to other API like tlcl_cr50_get_boot_mode) example: https://review.coreboot.org/c/coreboot/+/79736/4/src/security/tpm/tss/vendo… -- To view, visit https://review.coreboot.org/c/coreboot/+/79736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifd0e850770152a03aa46d7f8bbb76f7520a59081 Gerrit-Change-Number: 79736 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Paz Zcharya <pazz(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paz Zcharya <pazz(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Comment-Date: Thu, 28 Dec 2023 11:08:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit December 2023