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Please visit
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Change subject: Update vboot submodule to upstream main
......................................................................
Update vboot submodule to upstream main
Updating from commit id 24cb127a:
2023-08-21 Nicholas Bishop sign_uefi_unittest.py: Fix long-line lint
to commit id f2b01bf0:
2023-10-27 Julius Werner firmware: Undeprecate VB2_RECOVERY_FW_GET_FW_BODY
This brings in 47 new commits:
f2b01bf0 firmware: Undeprecate VB2_RECOVERY_FW_GET_FW_BODY
ef6d02df futility/vb2_helper: Add missing newline for error messages
886d13d7 PRESUBMIT: switch to cros format
ac2e1a75 host/lib: Decouple openssl headers from HOSTLIB
86ec05f7 futility: updater: Add help info for --quirks
2850244e futility: updater: Abort if the unlock_csme_* is used on a locked device
f1b5c88d devkeys: delete old unused firmware_bmpfv.bin
4444c5fe crossystem: Fix tpm_fwver for fwid < 12935
98ef339f 2lib: Prevent overwriting the value of fw_vboot2
c7517eb4 make_dev_ssd: support ChromeOS Kdump
8e3462cc tlcl: Increase the TPM_BUFFER_SIZE
740a2966 vboot_reference: Drop 'host' usage for 'internal' in flashrom.h
57877a44 vboot: Remove comments about physical dev switch
3401d16c 2lib: Fix typos, comments and formats
fdf52d45 scripts/: Drop deprecated {g,s}et_gbb_flags.sh scripts
bf76e9ee 2lib: Output the correct kernel_version
1ac4663e make_dev_firmware.sh: update pattern for matching wp status
c57ab9f7 2lib: Add recovery reason VB2_RECOVERY_WIDEVINE_PREPARE
e094ba31 tlcl: Reduce the variants of TPM2B
b047600d sign_official_build: support key config for pkcs11
f8712b73 vboot: support signing with pkcs11 private key
17fe786f strip_boot_from_image.sh: sfill fast
6c856cd3 futility/updater: Fix EC software write protection logic
1dc5a421 futility: update: Deprecate --unlock_me by --quirk unlock_csme_nissa
f0d88587 futility: update: Refactor the 'unlock ME' quirk(s)
81429ee9 futility: update: Do not update RO when the AP RO is locked
a3beb737 futility: update: Revise the ordering or quirks
2c1844fa futility: update: Remove unused quirk 'unlock_wilco_me_for_update'
75530d32 tests/futility: Test with new signer_config.csv based firmware updater
cba649fa 2lib: Expose 2hmac
ab015448 2lib: Refactor hmac to vb2_hmac_calculate
3545f8b4 Revert "sign_uefi: Remove exception catching"
55f625a9 dump_fmap: Add offset and size to flash_ec format output
a27ee336 keygeneration: add shellcheck source statements to help linting
055f9aa2 keygeneration: replace_recovery_key.sh: make minios key optional
6cb8ab60 scripts: delete unused values kernel command line
1f76c38b vboot: Drop phone recovery support
ccf6b037 scripts: Legacy fix for set_gbb_flags.sh
8f03069e futility: Add basic README.md
88963df8 utility: Query platform wp status with futility
6c3817d2 utility: Drop cros_alias technical debt in dev_debug_vboot
df85f512 scripts: Drop cros_alias technical debt in make_dev_firmware.sh
7395cd68 futility/updater_utils.c: Match on EC path to prepare for split
52518415 crossystem: Recover corrupted RW_NVRAM on flash writes
81f9ddaf futility/cmd_gbb_utility.md: Add basic GBB subcmd doc
c4995268 futility/: Fix define confusion
69dab5a6 crossystem: Avoid writing duplicate entries to RW_NVRAM
6c37b520 Revert "crossystem: stop supporting legacy chromeos_acpi driver"
Change-Id: Ic7ecd1755d26df349b8abf1c5a77c806facfe1d8
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M 3rdparty/vboot
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/78820/1
diff --git a/3rdparty/vboot b/3rdparty/vboot
index 24cb127..f2b01bf 160000
--- a/3rdparty/vboot
+++ b/3rdparty/vboot
@@ -1 +1 @@
-Subproject commit 24cb127a5e83a713131ab75cc39b11336019443c
+Subproject commit f2b01bf08a813fb3035102c7c948b78fa191e544
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Change subject: drivers/intel/gma/opregion: Use CBFS cache to load VBT
......................................................................
Patch Set 30: Code-Review+2
(1 comment)
Patchset:
PS24:
> I guess we can till early next week then.
Yeah sorry, was out for a while and now have too much to catch up on. This looks fine though.
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Change subject: mb/{google,intel}: Update FMD to support CBFS verification
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd:
https://review.coreboot.org/c/coreboot/+/78502/comment/bd80fe13_cd6500f5 :
PS2, Line 12: ME_RW_A(CBFS)@0x214800 0x190000
> I updated patch to fix the offsets for boards that are using them. […]
I mean, I really think it would be better to just get rid of the hardcoded offsets entirely, but sure, this works.
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Change subject: mb/google/nissa: Add AUDIO_CONFIG in fw_config
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78791/comment/6a1af0eb_4e5028b3 :
PS1, Line 10: deptcharge
depthcharge
https://review.coreboot.org/c/coreboot/+/78791/comment/bb7a67d5_e5c56673 :
PS1, Line 10: .S
Add a space
File src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/78791/comment/fdf41e6b_95caf138 :
PS1, Line 4: AMP_I2S
Please rename this to AMP_RT5650. The config is specific to RT5650, and if we ever support other non-GPIO AMPs on nissa they will need their own config.
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Change subject: cbmem.h: Drop cbmem_possible_online in favor of ENV_HAS_CBMEM
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> > Looks like the definitions for `cbmem_possibly_online()` and `ENV_HAS_CBMEM` were not the same? `E […]
Fair enough, guess you're right. I remembered that some boards access CBFS from SMM (which in itself is a horrible thing) and thought they'd also access CBMEM, but it looks like they do not.
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Change subject: lib/fw_config: Avoid negative bit shift
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> It's one compare, not a bunch of code to check it. […]
I mean... I'd say checking in code that tests for something which can't happen is a waste of time?
I was here reviewing this code when it was written. I remember thinking about this part and concluding that a check was unnecessary. It's just odd to then suddenly reverse that decision later only because a random tool that doesn't have as much context as the people who wrote and reviewed this code said so.
I think linters and static analyzers are great to point out things that may have been overlooked, but we should remember that they're just that... reminders to take another look.
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Change subject: arch/x86/memcpy.c: Optimize code for 64bit
......................................................................
Patch Set 3: Code-Review+1
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Change subject: security/vboot: Avoid using invalid vb2_context pointer
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Do you have an explicit bug you're trying to fix here? In general, `assert()` is the check you're supposed to use when you "know" that something must be true (because of the way the rest of the code is written) and just want to add an extra sanity check that will warn people in case e.g. future refactoring breaks your assumptions. I think(?) that's true for all the cases here, so I think asserts are the right kind of check. We shouldn't start aggressively replacing all asserts in coreboot with die()-ifs just because we're worried that something might slip through... those should be reserved for the kinds of checks where you can't 100% guarantee from the code alone that something will always be true (e.g. checks that depend on the behavior of external peripherals).
(FATAL_ASSERTS is a separate topic. Personally, I wouldn't mind turning it on for our production builds, I don't think there's a point in leaving it off for ChromeOS. In practice, since we have it on for serial builds and we run that a lot anyway, we can usually be pretty certain that by the time we start making production builds all the situations that could force assertion errors are shaken out anyway.)
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Change subject: arch/x86/memcpy.c: Optimize code for 64bit
......................................................................
Patch Set 2:
(1 comment)
File src/arch/x86/memcpy.c:
https://review.coreboot.org/c/coreboot/+/78646/comment/c645fdf6_4eb580a0 :
PS2, Line 30: : "=&c" (d0), "=&D" (d1), "=&S" (d2)
> BTW, the code in the kernel is: […]
Done
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Hello Jérémy Compostella, Martin L Roth, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/78646?usp=email
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Change subject: arch/x86/memcpy.c: Optimize code for 64bit
......................................................................
arch/x86/memcpy.c: Optimize code for 64bit
In 64bit movsq is available which moves memory in chunks of 8 bytes
rather than 4 bytes.
Linux uses the same code.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I65f178d2ed3aae54b0c1ce739c2b4af8738b9fcc
---
M src/arch/x86/memcpy.c
1 file changed, 10 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/78646/3
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