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Change subject: cpu/x86: Support SMBASE relocation-only use-case
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
> ah, ok, that special hob being within smram/tseg and not just being a regular hob makes me a bit les […]
In this instance, we want to enable secure boot properly, which depends on the integrity of its variables. So, verifying and performing a SPI write should be performed together (which is why we can't use SMMSTORE).
I guess it'd be possible for someone to include proprietary code in SMM, but as I see it, I'm only concerned with the open-source implementation of UefiPayload (as far as I'm aware at this time, we don't have any SMM we're keeping closed at 9elements), and if the user and/or platform builder want to add binaries they can't verify, that's their responsibility.
Ah. Unfortunately I have university classes at 1pm EST. I might be able to make it one of these weeks anyway though.
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Change subject: Update vboot submodule to upstream main
......................................................................
Patch Set 1: Code-Review+2
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Change subject: util/lint: Fix some mistakes in spelling.txt
......................................................................
Patch Set 1: Code-Review+2
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Change subject: Update vboot submodule to upstream main
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78820/comment/5a975710_7e91b759 :
PS1, Line 53: ccf6b037 scripts: Legacy fix for set_gbb_flags.sh
> Go home checkpatch, you're drunk.
Fix: CB:78822
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Change subject: util/lint: Fix some mistakes in spelling.txt
......................................................................
util/lint: Fix some mistakes in spelling.txt
Somehow two words slipped in here where the "bad" and "good" spellings
are the same, which doesn't make sense. Remove them.
Change-Id: I9b53ce8538616c164efb4eb25ff859975ddadfd2
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M util/lint/spelling.txt
1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/78822/1
diff --git a/util/lint/spelling.txt b/util/lint/spelling.txt
index 8f515d8..25605ef 100644
--- a/util/lint/spelling.txt
+++ b/util/lint/spelling.txt
@@ -4136,7 +4136,6 @@
frontent||frontend
frops||drops
frop||drop
-ftbs||ftbs
fualts||faults
fualt||fault
fucntions||functions
@@ -7362,7 +7361,6 @@
readabilty||readability
readapted||re-adapted
readiable||readable
-readme||readme
realeased||released
realeases||releases
realease||release
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Change subject: mb/google/brya/var/omnigul: Add fingerprint SPI
......................................................................
Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78427/comment/b7fea341_8aa52681 :
PS8, Line 13:
> extra space.
Done
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Hello Eric Lai, Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/omnigul: Add fingerprint SPI
......................................................................
mb/google/brya/var/omnigul: Add fingerprint SPI
Add fingerprint SPI, and power off FPMCU during romstage.
BUG=b:305860604, b:306320063
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot, measure evtest can detect and check device probed in kernel log
Change-Id: Ic7b9e29ca3cb9352fe098156924fde2719399a79
Signed-off-by: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/omnigul/gpio.c
M src/mainboard/google/brya/variants/omnigul/overridetree.cb
2 files changed, 25 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/78427/9
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Change subject: Update vboot submodule to upstream main
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78820/comment/0b75f7fb_8e0f122d :
PS1, Line 53: ccf6b037 scripts: Legacy fix for set_gbb_flags.sh
Go home checkpatch, you're drunk.
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Change subject: vboot: Add catchall recovery reason for unspecified phase 4 errors
......................................................................
Abandoned
Whoops, right. Moved to CB:78821
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Hello Yu-Ping Wu,
I'd like you to do a code review.
Please visit
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to review the following change.
Change subject: vboot: Add catchall recovery reason for unspecified phase 4 errors
......................................................................
vboot: Add catchall recovery reason for unspecified phase 4 errors
The code for "phase 4" of firmware verification currently only sets a
recovery reason when there's an actual hash mismatch detected in
vb2api_check_hash_get_digest(). This is the most likely way how this
section of code can fail but not the only one. If any other unexpected
issue occurs, we should still set a recovery reason rather than just
reboot and risk an infinite boot loop.
This patch adds a catchall recovery reason for any error code that falls
out of this block of code. If a more specific recovery reason had
already been set beforehand, we'll continue to use that -- if not, we'll
set VB2_RECOVERY_FW_GET_FW_BODY.
Change-Id: If00f8f8a5d17aa113e0325aad58d367f244aca49
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/security/vboot/vboot_logic.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/78821/1
diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c
index 11983b9..93a188c 100644
--- a/src/security/vboot/vboot_logic.c
+++ b/src/security/vboot/vboot_logic.c
@@ -374,7 +374,7 @@
}
if (rv)
- vboot_save_and_reboot(ctx, rv);
+ vboot_fail_and_reboot(ctx, VB2_RECOVERY_FW_GET_FW_BODY, rv);
vboot_save_data(ctx);
/* Only extend PCRs once on boot. */
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