coreboot-gerrit January 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: src/soc/intel: Add in-code documentation
by Paul Menzel (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Maximilian Brune. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71664 ) Change subject: src/soc/intel: Add in-code documentation ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/71664/comment/dc8901f6_1017706d PS1, Line 7: Add in-code documentation Maybe: Document meaning of variables Patchset: PS1: Please also do that for Meteor Lake. -- To view, visit https://review.coreboot.org/c/coreboot/+/71664 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf88f34cedd09e2461bb05050392e178ec84d5d0 Gerrit-Change-Number: 71664 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 11:45:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/intel/txt: Add helper function to disable TXT
by Subrata Banik (Code Review) 07 Jan '23

07 Jan '23

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[M] Change in coreboot[master]: cpu/x86/smm: Enable setting SMM console log level from mainboard
by Paul Menzel (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Marc Jones, Martin L Roth, Patrick Rudolph, Jonathan Zhang, Johnny Lin, Rocky Phagura, Jingle Hsu, Angel Pons, Arthur Heymans, Morgan Jang, Kyösti Mälkki. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49460 ) Change subject: cpu/x86/smm: Enable setting SMM console log level from mainboard ...................................................................... Patch Set 28: (4 comments) File src/cpu/x86/Kconfig: https://review.coreboot.org/c/coreboot/+/49460/comment/8f81e045_8668b965 PS28, Line 217: This enables setting SMM console log level from mainboard, it can let : SMM have different log level than other stages for more flexibility. “from mainboard” is ambiguous for me. Maybe keep using “at runtime”. This enables setting the SMM console log level at runtime for more flexibility to use different log levels for each stage. https://review.coreboot.org/c/coreboot/+/49460/comment/673d224d_37a2b6ec PS28, Line 219: certain data that requires searching I do not know, what you mean here. Can you please rephrase or give an example? File src/cpu/x86/smm/smm_module_handler.c: https://review.coreboot.org/c/coreboot/+/49460/comment/2b7fa4f3_8ff0a85a PS28, Line 58: return smm_runtime.smm_log_level; Can’t you do the check in C, and return 0 if `!IS_ENABLED(RUNTIME_CONFIGURABLE_SMM_LOGLEVEL)`? File src/include/cpu/x86/smm.h: https://review.coreboot.org/c/coreboot/+/49460/comment/a3c6b109_9d0edcb2 PS28, Line 70: u8 smm_log_level; In `src/console/init.c` `get_log_level()` returns int. Can we keep the `int`? -- To view, visit https://review.coreboot.org/c/coreboot/+/49460 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Gerrit-Change-Number: 49460 Gerrit-PatchSet: 28 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 11:41:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/intel/txt: Add helper function to disable TXT
by Paul Menzel (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Subrata Banik, Jérémy Compostella, Sridhar Siricilla, Angel Pons, Lean Sheng Tan, Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71574 ) Change subject: security/intel/txt: Add helper function to disable TXT ...................................................................... Patch Set 6: (1 comment) File src/security/intel/txt/txtlib.c: https://review.coreboot.org/c/coreboot/+/71574/comment/f8fb0494_862d152e PS5, Line 63: printk(BIOS_INFO, "CPU is not TXT capable.\n"); > > No idea how the function is supposed to be called, but I’d say something is wrong […] Thank you for sharing the logs, helping me. If we know in the beginning already, if TXT is supported or not, can the caller also only call the function, if TXT is supported? Otherwise that information would also be logged twice. -- To view, visit https://review.coreboot.org/c/coreboot/+/71574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f613428e82a1dd924172eab853d2ce9c32b473 Gerrit-Change-Number: 71574 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 11:32:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Disable Intel TXT based on `INTEL_TXT` config
by Subrata Banik (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Paul Menzel, Angel Pons, Lean Sheng Tan, Werner Zeh. Hello build bot (Jenkins), Tarun Tuli, Jérémy Compostella, Sridhar Siricilla, Angel Pons, Arthur Heymans, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71575 to look at the new patch set (#7). Change subject: soc/intel/alderlake: Disable Intel TXT based on `INTEL_TXT` config ...................................................................... soc/intel/alderlake: Disable Intel TXT based on `INTEL_TXT` config This patch makes the call into TXT lib in order to disable the TXT if SoC user haven't selected the `INTEL_TXT` config. Disabling TXT would be helpful to access VGA framebuffer prior calling into FSP-M. TEST=Able to perform disable_txt and unlock memory which helped to access VGA framebuffer prior calling into FSP-M. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I9dd7c5492a5f45eef0dd9e836cc2da1844c78919 --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/romstage/romstage.c 2 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/71575/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/71575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd7c5492a5f45eef0dd9e836cc2da1844c78919 Gerrit-Change-Number: 71575 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/alderlake: Disable Intel TXT
by Subrata Banik (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Paul Menzel, Angel Pons, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71575 ) Change subject: soc/intel/alderlake: Disable Intel TXT ...................................................................... Patch Set 6: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/71575/comment/1564d27f_b2def6d9 PS6, Line 8: > … for framebuffer access Ack https://review.coreboot.org/c/coreboot/+/71575/comment/18d6f7a6_56788bc5 PS6, Line 10: > Please add a problem description, why disabling TXT might be useful. Ack File src/soc/intel/alderlake/romstage/romstage.c: https://review.coreboot.org/c/coreboot/+/71575/comment/efd43ffc_e87e5262 PS6, Line 142: * It would help to access VGA framebuffer prior calling into FSP-M > Please add a dot/period at the end of sentences. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/71575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd7c5492a5f45eef0dd9e836cc2da1844c78919 Gerrit-Change-Number: 71575 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 10:27:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/intel/txt: Add helper function to disable TXT
by build bot (Jenkins) (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Jérémy Compostella, Paul Menzel, Sridhar Siricilla, Angel Pons, Lean Sheng Tan, Werner Zeh. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71574 ) Change subject: security/intel/txt: Add helper function to disable TXT ...................................................................... Patch Set 6: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167870): https://review.coreboot.org/c/coreboot/+/71574/comment/fc5319ca_c351a7b8 PS6, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/71574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f613428e82a1dd924172eab853d2ce9c32b473 Gerrit-Change-Number: 71574 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 10:21:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: security/intel/txt: Add helper function to disable TXT
by Subrata Banik (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Jérémy Compostella, Paul Menzel, Sridhar Siricilla, Angel Pons, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71574 ) Change subject: security/intel/txt: Add helper function to disable TXT ...................................................................... Patch Set 5: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/71574/comment/4ccaf0cd_687eee9e PS5, Line 7: security/intel/txt: Helper function to disable TXT > Please make it a statement: Add helper function to disable TXT Ack https://review.coreboot.org/c/coreboot/+/71574/comment/1063e6bd_e589f86a PS5, Line 9: This patch > Add a function to disable TXT as per … Done https://review.coreboot.org/c/coreboot/+/71574/comment/935681f4_d77dbdd1 PS5, Line 12: On platform with TXT disabled, the memory can be unlocked using > platforms Done File src/security/intel/txt/txtlib.c: https://review.coreboot.org/c/coreboot/+/71574/comment/878799ee_39473464 PS5, Line 57: /* Don't disable if INTEL_TXT config is selected */ > I’d say the comment is redundant, as the code is clear. Done https://review.coreboot.org/c/coreboot/+/71574/comment/a7aee487_52548c45 PS5, Line 59: return; > I’d check that on the caller side. […] Done https://review.coreboot.org/c/coreboot/+/71574/comment/5deea4a5_797a5327 PS5, Line 63: printk(BIOS_INFO, "CPU is not TXT capable.\n"); > No idea how the function is supposed to be called, but I’d say something is wrong Can you please elaborate, what you mean by *something is wrong*. Typically, low end SoCs doesn't have TXT feature enabled, and this is generic function hence, we should have a check in place to know if the said SoC has TXT support enabled. Without that, it's meaningless to try disabling TXT on a SKU where this feature itself is not present. > if it’s called on a non-TXT capable CPU? (Maybe print the CPU model?) SKU here CPU is TXT unsupported ``` [NOTE ] coreboot-coreboot-unknown.9999.31198eb Thu Dec 29 06:07:08 UTC 2022 bootblock starting (log level: 8)... [DEBUG] CPU: 12th Gen Intel(R) Core(TM) i3-1215U [DEBUG] CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423 [DEBUG] CPU: AES supported, TXT NOT supported, VT supported ``` same board with different SOC SKU ``` coreboot-coreboot-unknown.9999.408fbd4 Fri Dec 30 01:05:08 UTC 2022 bootblock starting (log level: 8)... CPU: 12th Gen Intel(R) Core(TM) i7-1265U CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423 CPU: AES supported, TXT supported, VT supported ``` Not sure what you mean by print the CPU model. Ideally I would avoid adding a print. The purpose of this API is to turn off TXT memory protection hence, any additional output msg is meaningless (this function is returning void) https://review.coreboot.org/c/coreboot/+/71574/comment/714de0a2_69db3b42 PS5, Line 70: security(TPM) > Add a space before the (? Done https://review.coreboot.org/c/coreboot/+/71574/comment/9aba9bea_51e6a522 PS5, Line 74: printk(BIOS_INFO, "TXT disabled successfully- Unlock Memory\n"); > 1. Add a space before the -? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/71574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f613428e82a1dd924172eab853d2ce9c32b473 Gerrit-Change-Number: 71574 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 10:21:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/intel/txt: Add helper function to disable TXT
by Subrata Banik (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Subrata Banik, Jérémy Compostella, Sridhar Siricilla, Angel Pons, Lean Sheng Tan, Werner Zeh. Hello build bot (Jenkins), Tarun Tuli, Jérémy Compostella, Sridhar Siricilla, Angel Pons, Arthur Heymans, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71574 to look at the new patch set (#6). Change subject: security/intel/txt: Add helper function to disable TXT ...................................................................... security/intel/txt: Add helper function to disable TXT Add a function to disable TXT as per TXT BIOS spec Section 6.2.5. AP firmware can disable TXT if TXT fails or TPM is already enabled. On platforms with TXT disabled, the memory can be unlocked using MSR 0x2e6. TEST=Able to perform disable_txt on SoC SKUs with TXT enabled. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I27f613428e82a1dd924172eab853d2ce9c32b473 --- M src/include/cpu/x86/msr.h M src/security/intel/txt/txt.h M src/security/intel/txt/txtlib.c 3 files changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/71574/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/71574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f613428e82a1dd924172eab853d2ce9c32b473 Gerrit-Change-Number: 71574 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: mb/google/brya/var/omnigul: Update GPIO settings
by Dtrain Hsu (Code Review) 07 Jan '23

07 Jan '23

Attention is currently required from: Jamie Chen, Tarun Tuli, Ian Feng. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71706 ) Change subject: mb/google/brya/var/omnigul: Update GPIO settings ...................................................................... Patch Set 10: Code-Review+1 (7 comments) File src/mainboard/google/brya/variants/omnigul/gpio.c: https://review.coreboot.org/c/coreboot/+/71706/comment/31355f52_354bb9fd PS9, Line 72: PAD_NC(GPP_B23, NONE), Baseboard is already PAD_NC. Do you need to override it? https://review.coreboot.org/c/coreboot/+/71706/comment/102a3656_9d80f2dc PS9, Line 148: /* E21 : DDP2_CTRLDATA ==> USB_C1_LSX_SOC_RX_STRAP */ : /* E22 : DDPA_CTRLCLK ==> USB_C0_AUX_DC_STRAP_P */ : PAD_CFG_GPO(GPP_E22, 1, DEEP), : /* E23 : DDPA_CTRLDATA ==> USB_C0_AUX_DC_N */ : PAD_CFG_GPO(GPP_E23, 1, DEEP), Could you check GPP_E22 and GPP_E23 the same with baseboard or not? https://review.coreboot.org/c/coreboot/+/71706/comment/30bcab0b_859fdb6b PS9, Line 194: /* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */ : PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG), : /* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */ : PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG), Could you check GPP_H6 and GPP_H7 the same with baseboard or not? https://review.coreboot.org/c/coreboot/+/71706/comment/c9c7f6e8_7022489a PS9, Line 231: PAD_CFG_NF_LOCK(GPP_R7, NONE, NF3, LOCK_CONFIG), Could you check GPP_R7 setting? https://review.coreboot.org/c/coreboot/+/71706/comment/7757fbdc_7cc51d31 PS9, Line 233: /* S0 : SNDW0_CLK ==> I2S_SPKR_SCLK_R */ : PAD_CFG_NF_LOCK(GPP_S0, NONE, NF4, LOCK_CONFIG), : /* S1 : SNDW0_DATA ==> I2S_SPKR_SFRM_R */ : PAD_CFG_NF_LOCK(GPP_S1, NONE, NF4, LOCK_CONFIG), Could you check GPP_S0 and GPP_S1 settings? https://review.coreboot.org/c/coreboot/+/71706/comment/ee618b44_aacd3a86 PS9, Line 240: PAD_NC(GPP_S3, NONE), Could you check GPP_S3 setting? https://review.coreboot.org/c/coreboot/+/71706/comment/ed43f13d_c6646591 PS9, Line 250: /* GPD2 : LAN_WAKE# ==> EC_PCH_WAKE_ODL */ : PAD_CFG_GPO(GPD2, 1, DEEP), I think it is the same with baseboard. Could you help to check it? -- To view, visit https://review.coreboot.org/c/coreboot/+/71706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5cfaa8fce6df7f09b744fb3e0b7b1d5b6acdc79b Gerrit-Change-Number: 71706 Gerrit-PatchSet: 10 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 07 Jan 2023 09:12:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit January 2023