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Change subject: util/crossgcc: Update GCC from 11.2 to 11.3
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Should we go through all of gcc versions?
maybe we can wait "arm-trusted-firmware" for binutils fix and upgrade to latest binutils, solve the issues we have with gnat & lib/gnat, then upgrade GCC?
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Subrata Banik has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/70222 )
Change subject: soc/intel/cmn/tcss: Skip sending CONN IPC command during S3 resume
......................................................................
soc/intel/cmn/tcss: Skip sending CONN IPC command during S3 resume
This patch skips sending CONN IPC command to PMC if system is resuming
from S3.
Sending CONN IPC command as part of `tcss_configure_dp_mode()` function
results into ERROR while system is resuming from S3.
BUG=b:260984500
TEST=Able to test on Google/Rex.
Without this patch:
[ERROR] pmc_send_ipc_cmd status: fatal
[ERROR] Port 1 connect request failed
[SPEW ] [TCSS] TcssInit() - End
With this patch:
No error seen during S3 resume.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I1dab7dc8b4ad76ca0c9630456803c1b9a320fe40
---
M src/soc/intel/common/block/tcss/tcss.c
1 file changed, 28 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/70222/2
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Change subject: util/crossgcc: Update GCC from 11.2 to 11.3
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
patches are missing
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Change subject: cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm
......................................................................
Patch Set 18: Code-Review+1
(2 comments)
File src/northbridge/intel/gm45/northbridge.c:
https://review.coreboot.org/c/coreboot/+/69297/comment/7ab44db5_5290f895
PS18, Line 264: __pci_0_00_0
Shall this better be 'pcidev_on_root(0, 0);'?
File src/southbridge/intel/i82801ix/lpc.c:
https://review.coreboot.org/c/coreboot/+/69297/comment/f2f52bb4_99b44bb3
PS18, Line 143: __pci_0_1f_0
pcidev_on_root(0x1f, 0)?
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Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70222 )
Change subject: soc/intel/cmn/tcss: Skip sending CONN IPC command during S3 resume
......................................................................
soc/intel/cmn/tcss: Skip sending CONN IPC command during S3 resume
This patch skips sending CONN IPC command to PMC if system is resuming
from S3.
Sending CONN IPC command as part of `tcss_configure_dp_mode()` function
results into ERROR while system is resuming from S3.
Without this patch:
[ERROR] pmc_send_ipc_cmd status: fatal
[ERROR] Port 1 connect request failed
[SPEW ] [TCSS] TcssInit() - End
With this patch:
No error seen during S3 resume.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I1dab7dc8b4ad76ca0c9630456803c1b9a320fe40
---
M src/soc/intel/common/block/tcss/tcss.c
1 file changed, 26 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/70222/1
diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c
index b4a5a0e..5896b93 100644
--- a/src/soc/intel/common/block/tcss/tcss.c
+++ b/src/soc/intel/common/block/tcss/tcss.c
@@ -415,7 +415,7 @@
if (tcss_ops.configure_aux_bias_pads)
tcss_ops.configure_aux_bias_pads(aux_bias_pads);
- if (CONFIG(ENABLE_TCSS_DISPLAY_DETECTION))
+ if (CONFIG(ENABLE_TCSS_DISPLAY_DETECTION) && !platform_is_resuming())
tcss_configure_dp_mode(port_map, num_ports);
}
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Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70221 )
Change subject: util/crossgcc: Update GCC from 11.2 to 11.3
......................................................................
util/crossgcc: Update GCC from 11.2 to 11.3
While the work on updating GCC to version 12 is still WIP, update it
to the latest minor release 11.3.
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I8810bbb238b01985774ff8da1e246ab1b192e663
---
M util/crossgcc/buildgcc
D util/crossgcc/sum/gcc-11.2.0.tar.xz.cksum
A util/crossgcc/sum/gcc-11.3.0.tar.xz.cksum
3 files changed, 15 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/70221/1
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 5b26922..76ec454a 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -35,7 +35,7 @@
GMP_VERSION=6.2.1
MPFR_VERSION=4.1.1
MPC_VERSION=1.2.1
-GCC_VERSION=11.2.0
+GCC_VERSION=11.3.0
BINUTILS_VERSION=2.37
IASL_VERSION="R10_20_22"
# CLANG version number
diff --git a/util/crossgcc/sum/gcc-11.2.0.tar.xz.cksum b/util/crossgcc/sum/gcc-11.2.0.tar.xz.cksum
deleted file mode 100644
index 071c352..0000000
--- a/util/crossgcc/sum/gcc-11.2.0.tar.xz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-f902ccacecf8949978d6261e9f1d034cff73ffdb tarballs/gcc-11.2.0.tar.xz
diff --git a/util/crossgcc/sum/gcc-11.3.0.tar.xz.cksum b/util/crossgcc/sum/gcc-11.3.0.tar.xz.cksum
new file mode 100644
index 0000000..a4d2bd5
--- /dev/null
+++ b/util/crossgcc/sum/gcc-11.3.0.tar.xz.cksum
@@ -0,0 +1 @@
+cf86a48278f9a6f4b03d4390550577b20353b4e9 tarballs/gcc-11.3.0.tar.xz
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David Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69965 )
Change subject: drivers/generic/nau8315: Allow custom _HID from config
......................................................................
Patch Set 1:
(1 comment)
File src/drivers/generic/nau8315/nau8315.c:
https://review.coreboot.org/c/coreboot/+/69965/comment/6d2fc7ae_f0b61f80
PS1, Line 29: acpigen_write_name_string("_HID", config->hid);
> We can do it in the same patch or you can submit new one. […]
Hi Eric,
Since NAU8825 don't use same driver, I will ignore it, just focus on NAU8315/NAU8318. So this style is like as kernel driver with compatible id.
I will check with you by mail.
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Change subject: google/veyron: Fix add type to function definition
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
"-Wold-style-definition" gcc flag will warn I think.
(CB:70205)
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