coreboot-gerrit December 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Add MTL-P RVP board ids
by Harsha B R (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Wonkyu Kim, Ravishankar Sarawadi, Rizwan Qureshi, Angel Pons, Krishna P Bhat D, Tim Wawrzynczak, Tarun Tuli, Jamie Ryu, Subrata Banik, Kapil Porwal, Nick Vaccaro, Ronak Kanabar, Raj Astekar. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66102 ) Change subject: mb/intel/mtlrvp: Add MTL-P RVP board ids ...................................................................... Patch Set 15: (1 comment) File src/mainboard/intel/mtlrvp/board_id.c: https://review.coreboot.org/c/coreboot/+/66102/comment/c8f03119_eb8190b9 PS4, Line 10: > Since the requested code changes will be addressed later (as part of cros_bug), please do help in re […] Created CB:70227 addressing the common code for board_id specific implementation -- To view, visit https://review.coreboot.org/c/coreboot/+/66102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90b0543d5db208f696d2c2c2dc3d2581514a845b Gerrit-Change-Number: 66102 Gerrit-PatchSet: 15 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 16:14:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Harsha B R <harsha.b.r(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: src/ec/intel: Create common code for board_id implementation
by Subrata Banik (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Martin L Roth, Harsha B R, Rizwan Qureshi, Krishna P Bhat D, Ronak Kanabar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70227 ) Change subject: src/ec/intel: Create common code for board_id implementation ...................................................................... Patch Set 1: (2 comments) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/70227/comment/2d2f7686_aaa37df9 PS1, Line 83: y CONFIG(EC_ACPI) File src/ec/intel/board_id.h: https://review.coreboot.org/c/coreboot/+/70227/comment/54aa98a1_ad76e3e8 PS1, Line 6: /* : * Returns board_id : */ use single line commenting style -- To view, visit https://review.coreboot.org/c/coreboot/+/70227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 Gerrit-Change-Number: 70227 Gerrit-PatchSet: 1 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Usha P <usha.p(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 16:09:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/intel/common: provide a list of D-states to enter LPM
by Subrata Banik (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Tarun Tuli, Eran Mitrani. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70166 ) Change subject: soc/intel/common: provide a list of D-states to enter LPM ...................................................................... Patch Set 3: (7 comments) File src/soc/intel/alderlake/acpi.c: https://review.coreboot.org/c/coreboot/+/70166/comment/47c48a8f_95bd7b0a PS3, Line 225: : min_sleep_state_t **get_min_sleep_state_array(int *size) : { : *size = ARRAY_SIZE(min_pci_sleep_states); : return &min_pci_sleep_states; : } nit: you cab avoid having double point (IMO, we don't need) struct min_sleep_state *get_min_sleep_state_array(size_t *size) { *size = ARRAY_SIZE(min_pci_sleep_states); return min_pci_sleep_states; } File src/soc/intel/common/block/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/70166/comment/1d869216_7d7ec71b PS3, Line 29: #define LPI_REVISION 0 : #define LPI_ENABLED 1 may be enum? https://review.coreboot.org/c/coreboot/+/70166/comment/6494c5ba_79cfdb5f PS3, Line 440: ** __weak struct min_sleep_state *get_min_sleep_state_array(size_t *size) { *size = 0; return NULL; } https://review.coreboot.org/c/coreboot/+/70166/comment/ff867832_78d9039d PS3, Line 448: min_sleep_state_t **min_pci_sleep_states; size_t size; struct min_sleep_state *state = get_min_sleep_state_array(&size); https://review.coreboot.org/c/coreboot/+/70166/comment/7014e527_e190a93c PS3, Line 464: *min_pci_sleep_states)[i].pci_dev state[i].pci_dev https://review.coreboot.org/c/coreboot/+/70166/comment/3a1d6201_8526bac8 PS3, Line 465: *min_pci_sleep_states)[i] state[i].min_sleep_state https://review.coreboot.org/c/coreboot/+/70166/comment/263cf287_962c08f3 PS3, Line 537: printk(BIOS_INFO, "Returning SoC specific constraint package for %d devices\n", num_entries); u can drop this -- To view, visit https://review.coreboot.org/c/coreboot/+/70166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45eded3868a4987cb5eb0676c50378ac52ec3752 Gerrit-Change-Number: 70166 Gerrit-PatchSet: 3 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 16:06:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: src/ec/intel: Create common code for board_id implementation
by Harsha B R (Code Review) 01 Dec '22

01 Dec '22

Harsha B R has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70227 ) Change subject: src/ec/intel: Create common code for board_id implementation ...................................................................... src/ec/intel: Create common code for board_id implementation This patch creates initial common code structure for board_id implementation for intel rvp platforms. Board_id helps in identifying the platform with respect to CHROME_EC and INTEL_EC (Windows_EC). Changes include 1. Create initial board_id.c and board_id.h 2. Modify the Makefile to include src/ec/intel directory BUG=b:260654043 TEST=Able to build with the patch and boot the mtlrvp platform with the subsequent patches in the train Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 --- M Makefile.inc A src/ec/intel/Makefile.inc A src/ec/intel/board_id.c A src/ec/intel/board_id.h 4 files changed, 50 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/70227/1 diff --git a/Makefile.inc b/Makefile.inc index ef565c2..8064a4a 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -80,6 +80,7 @@ ####################################################################### # root source directories of coreboot subdirs-y := src/lib src/commonlib/ src/console src/device src/acpi src/superio/common +subdirs-y += src/ec/intel subdirs-y += src/ec/acpi $(wildcard src/ec/*/*) $(wildcard src/southbridge/*/*) subdirs-y += $(wildcard src/soc/*) $(wildcard src/soc/*/common) $(filter-out $(wildcard src/soc/*/common),$(wildcard src/soc/*/*)) subdirs-y += $(wildcard src/northbridge/*/*) diff --git a/src/ec/intel/Makefile.inc b/src/ec/intel/Makefile.inc new file mode 100644 index 0000000..46c07a7 --- /dev/null +++ b/src/ec/intel/Makefile.inc @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +bootblock-y += board_id.c +romstage-y += board_id.c +ramstage-y += board_id.c + +CPPFLAGS_common += -I$(src)/ec/intel diff --git a/src/ec/intel/board_id.c b/src/ec/intel/board_id.c new file mode 100644 index 0000000..2be29aa --- /dev/null +++ b/src/ec/intel/board_id.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <boardid.h> +#include "board_id.h" + +/* Get Board ID */ +int get_board_id(void) +{ + return BOARD_ID_INIT; +} diff --git a/src/ec/intel/board_id.h b/src/ec/intel/board_id.h new file mode 100644 index 0000000..2b62daa --- /dev/null +++ b/src/ec/intel/board_id.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _MAINBOARD_COMMON_BOARD_ID_H_ +#define _MAINBOARD_COMMON_BOARD_ID_H_ + +/* + * Returns board_id + */ +int get_board_id(void); + +#endif /* _MAINBOARD_COMMON_BOARD_ID_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/70227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 Gerrit-Change-Number: 70227 Gerrit-PatchSet: 1 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/rex: Add PCIe based SD controller
by Kapil Porwal (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Ivy Jian. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70064 ) Change subject: mb/google/rex: Add PCIe based SD controller ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23d53e4d61ec36d2145f9e5816d97d13eb5b219e Gerrit-Change-Number: 70064 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 16:03:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Documentation: Add wake source info to device tree documentation
by Raul Rangel (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Dmitry Torokhov, Tim Wawrzynczak, Paul Menzel. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67385 ) Change subject: Documentation: Add wake source info to device tree documentation ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: > ERROR: Error cloning remote repo 'origin' :/ Martin, can you restart the build please? :) -- To view, visit https://review.coreboot.org/c/coreboot/+/67385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifcdbd5371408784bf9b81c1ade90263de8c60e0f Gerrit-Change-Number: 67385 Gerrit-PatchSet: 8 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Dmitry Torokhov <dtor(a)chromium.org> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Mark Hasemeyer <markhas(a)google.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Dmitry Torokhov <dtor(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 01 Dec 2022 15:52:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/skyrim/var/winterhold: update thermal config
by Raul Rangel (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Dtrain Hsu, Jason Nien, EricKY Cheng, Chris Wang, Martin Roth, Eric Peers, Karthikeyan Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68472 ) Change subject: mb/google/skyrim/var/winterhold: update thermal config ...................................................................... Patch Set 31: (1 comment) Patchset: PS31: Seems to be a merge conflict, please rebase -- To view, visit https://review.coreboot.org/c/coreboot/+/68472 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0740cb5bb16cd53c2ee6937e32a974346012823 Gerrit-Change-Number: 68472 Gerrit-PatchSet: 31 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Thu, 01 Dec 2022 15:45:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by Raul Rangel (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Tim Van Patten, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... Patch Set 76: Code-Review+1 (1 comment) File src/mainboard/google/skyrim/variants/winterhold/include/variant/acpi/dtts.asl: PS76: Ah, sorry I missed this. Split the skyrim changes into their own CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 76 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Dec 2022 15:43:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ec/google/chromec: Add DPTC support for host event 1/2/9
by Raul Rangel (Code Review) 01 Dec '22

01 Dec '22

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67793 ) Change subject: ec/google/chromec: Add DPTC support for host event 1/2/9 ...................................................................... ec/google/chromec: Add DPTC support for host event 1/2/9 DTTS is Dynamic Thermal Table Switching Proposal. Add DPTC support for host event lid-open/lid-close/Thermal Threshold. BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67793 Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/ec/google/chromeec/acpi/ec.asl 1 file changed, 36 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Dtrain Hsu: Looks good to me, but someone else must approve diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index e4637b3..7c252e6 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -229,6 +229,11 @@ Method (_Q01, 0, NotSerialized) { Printf ("EC: LID CLOSE") +#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC) + If (CondRefOf (\_SB.DPTC)) { + \_SB.DPTC() + } +#endif Store (LIDS, \LIDS) #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) @@ -239,6 +244,11 @@ Method (_Q02, 0, NotSerialized) { Printf ("EC: LID OPEN") +#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC) + If (CondRefOf (\_SB.DPTC)) { + \_SB.DPTC() + } +#endif Store (LIDS, \LIDS) Notify (CREC, 0x2) #ifdef EC_ENABLE_LID_SWITCH @@ -540,6 +550,12 @@ */ Method (_Q09, 0, NotSerialized) { + +#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC) + If (CondRefOf (\_SB.DPTC)) { + \_SB.DPTC() + } +#endif If (!Acquire (^PATM, 1000)) { /* Read sensor ID for event */ Store (^PATI, Local0) -- To view, visit https://review.coreboot.org/c/coreboot/+/67793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 Gerrit-Change-Number: 67793 Gerrit-PatchSet: 31 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by Raul Rangel (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Tim Van Patten, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... Patch Set 76: Code-Review+2 (2 comments) File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/7d38282f_d76e0fc3 PS73, Line 34: If (CondRefOf (\_SB.DTTS)) : { > Please help to review the code change. Done File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/9a4809c7_da2d58b1 PS76, Line 33: /* If _SB.DTTS is not present, DTTS is not enabled. */ nit: Comment no longer applies. Remove it. -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 76 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Dec 2022 15:41:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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