coreboot-gerrit December 2022

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[S] Change in coreboot[master]: google/skyrim/Kconfig: Enable DPTC for Frostflow
by Raul Rangel (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Jason Nien, Martin Roth, Tim Van Patten. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70215 ) Change subject: google/skyrim/Kconfig: Enable DPTC for Frostflow ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I'm assuming the STT params are all set? -- To view, visit https://review.coreboot.org/c/coreboot/+/70215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2fb5c711a01a995c805eb4509f7b04bb41588365 Gerrit-Change-Number: 70215 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 18:47:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: MAINTAINERS: Add AMD mayan mainboard
by Fred Reitberger (Code Review) 01 Dec '22

01 Dec '22

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70217 ) Change subject: MAINTAINERS: Add AMD mayan mainboard ...................................................................... MAINTAINERS: Add AMD mayan mainboard Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I85d4d4fe11f0b579c2327f3d1dfce90229ca9dc9 --- M MAINTAINERS 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/70217/1 diff --git a/MAINTAINERS b/MAINTAINERS index 61d43e0..78ff0dd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -147,6 +147,7 @@ F: src/mainboard/amd/chausie/ F: src/mainboard/amd/majolica/ F: src/mainboard/amd/mandolin/ +F: src/mainboard/amd/mayan/ AMD reference boards outside of family 17h and 19h S: Odd Fixes -- To view, visit https://review.coreboot.org/c/coreboot/+/70217 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85d4d4fe11f0b579c2327f3d1dfce90229ca9dc9 Gerrit-Change-Number: 70217 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: google/skyrim/Kconfig: Enable DPTC for Morthal
by Tim Van Patten (Code Review) 01 Dec '22

01 Dec '22

Tim Van Patten has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70216 ) Change subject: google/skyrim/Kconfig: Enable DPTC for Morthal ...................................................................... google/skyrim/Kconfig: Enable DPTC for Morthal Enable SOC_AMD_COMMON_BLOCK_ACPI_DPTC for Morthal boards, to enable support for the low/no battery boot feature. BUG=b:217911928 TEST=build_packages --board=skyrim chromeos-bootimage --autosetgov Change-Id: I3eb6bee6601e34420a90f33f8f2c45cf3fe37f9b --- M src/mainboard/google/skyrim/Kconfig.name 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/70216/1 diff --git a/src/mainboard/google/skyrim/Kconfig.name b/src/mainboard/google/skyrim/Kconfig.name index 3146819..545e5a7 100644 --- a/src/mainboard/google/skyrim/Kconfig.name +++ b/src/mainboard/google/skyrim/Kconfig.name @@ -13,6 +13,7 @@ config BOARD_GOOGLE_MORTHAL bool "-> Morthal" select BOARD_GOOGLE_BASEBOARD_SKYRIM + select SOC_AMD_COMMON_BLOCK_ACPI_DPTC config BOARD_GOOGLE_FROSTFLOW bool "-> Frostflow" -- To view, visit https://review.coreboot.org/c/coreboot/+/70216 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3eb6bee6601e34420a90f33f8f2c45cf3fe37f9b Gerrit-Change-Number: 70216 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: google/skyrim/Kconfig: Enable DPTC for Frostflow
by Tim Van Patten (Code Review) 01 Dec '22

01 Dec '22

Tim Van Patten has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70215 ) Change subject: google/skyrim/Kconfig: Enable DPTC for Frostflow ...................................................................... google/skyrim/Kconfig: Enable DPTC for Frostflow Enable SOC_AMD_COMMON_BLOCK_ACPI_DPTC for Frostflow boards, to enable support for the low/no battery boot feature. BUG=b:217911928 TEST=build_packages --board=skyrim chromeos-bootimage --autosetgov Change-Id: I2fb5c711a01a995c805eb4509f7b04bb41588365 --- M src/mainboard/google/skyrim/Kconfig.name 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/70215/1 diff --git a/src/mainboard/google/skyrim/Kconfig.name b/src/mainboard/google/skyrim/Kconfig.name index 3146819..d663234 100644 --- a/src/mainboard/google/skyrim/Kconfig.name +++ b/src/mainboard/google/skyrim/Kconfig.name @@ -18,6 +18,7 @@ bool "-> Frostflow" select BOARD_GOOGLE_BASEBOARD_SKYRIM select DRIVERS_GENESYSLOGIC_GL9755 + select SOC_AMD_COMMON_BLOCK_ACPI_DPTC config BOARD_GOOGLE_CRYSTALDRIFT bool "-> Crystaldrift" -- To view, visit https://review.coreboot.org/c/coreboot/+/70215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2fb5c711a01a995c805eb4509f7b04bb41588365 Gerrit-Change-Number: 70215 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya/var/zydron: Set touchpads to use probed flag
by Nick Vaccaro (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: David Wu, Tarun Tuli, Nick Vaccaro, Tyler Wang. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70194 ) Change subject: mb/google/brya/var/zydron: Set touchpads to use probed flag ...................................................................... Patch Set 1: -Code-Review (1 comment) Patchset: PS1: According to the error, this CL needs to switch to using "detect" instead of "probed". -- To view, visit https://review.coreboot.org/c/coreboot/+/70194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a5ad5dc97cfaf1c10e7ff1e68b72af6add64c6 Gerrit-Change-Number: 70194 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 18:16:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/ec/intel: Create common code for board_id implementation
by Harsha B R (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Martin L Roth, Subrata Banik, Rizwan Qureshi, Krishna P Bhat D, Ronak Kanabar. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70227 ) Change subject: src/ec/intel: Create common code for board_id implementation ...................................................................... Patch Set 2: (2 comments) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/70227/comment/8c192e8b_23b425fe PS1, Line 83: y > CONFIG(EC_ACPI) Done File src/ec/intel/board_id.h: https://review.coreboot.org/c/coreboot/+/70227/comment/38376606_28c388d7 PS1, Line 6: /* : * Returns board_id : */ > use single line commenting style Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/70227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 Gerrit-Change-Number: 70227 Gerrit-PatchSet: 2 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Usha P <usha.p(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 17:46:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/ec/intel: Create common code for board_id implementation
by Harsha B R (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Martin L Roth, Harsha B R, Rizwan Qureshi, Krishna P Bhat D, Ronak Kanabar. Hello Martin L Roth, Subrata Banik, Rizwan Qureshi, Krishna P Bhat D, Ronak Kanabar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70227 to look at the new patch set (#2). Change subject: src/ec/intel: Create common code for board_id implementation ...................................................................... src/ec/intel: Create common code for board_id implementation This patch creates initial common code structure for board_id implementation for intel rvp platforms. Board_id helps in identifying the platform with respect to CHROME_EC and INTEL_EC (Windows_EC). Changes include 1. Create initial board_id.c and board_id.h 2. Modify the Makefile to include src/ec/intel directory BUG=b:260654043 TEST=Able to build with the patch and boot the mtlrvp platform with the subsequent patches in the train Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 --- M Makefile.inc A src/ec/intel/Makefile.inc A src/ec/intel/board_id.c A src/ec/intel/board_id.h 4 files changed, 48 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/70227/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 Gerrit-Change-Number: 70227 Gerrit-PatchSet: 2 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Usha P <usha.p(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/amd/mayan/port_descriptors.c: Update DXIO for mayan
by Fred Reitberger (Code Review) 01 Dec '22

01 Dec '22

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70214 ) Change subject: mb/amd/mayan/port_descriptors.c: Update DXIO for mayan ...................................................................... mb/amd/mayan/port_descriptors.c: Update DXIO for mayan Update DXIO descriptors for mayan per schematic 105-D59700-00A Rev 1.00 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: If1aca5423879433c1d0d2405d96cf7d806c57b20 --- M src/mainboard/amd/mayan/port_descriptors.c 1 file changed, 90 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/70214/1 diff --git a/src/mainboard/amd/mayan/port_descriptors.c b/src/mainboard/amd/mayan/port_descriptors.c index 151ad14..a22e6df 100644 --- a/src/mainboard/amd/mayan/port_descriptors.c +++ b/src/mainboard/amd/mayan/port_descriptors.c @@ -6,48 +6,97 @@ #include <soc/platform_descriptors.h> #include <types.h> -/* TODO: Update for mayan */ - static const fsp_dxio_descriptor mayan_dxio_descriptors[] = { - { + { /* MXM */ .engine_type = PCIE_ENGINE, .port_present = true, .start_logical_lane = 0, - .end_logical_lane = 0, - .device_number = 2, + .end_logical_lane = 3, + .device_number = 1, .function_number = 1, .link_speed_capability = GEN3, .turn_off_unused_lanes = true, - .link_aspm = 2, - .link_hotplug = 3, - .clk_req = CLK_REQ3, + .link_aspm = ASPM_L1, + .link_hotplug = 0, + .clk_req = CLK_REQ0, }, - { + { /* NVMe SSD0 */ .engine_type = PCIE_ENGINE, .port_present = true, - .start_logical_lane = 1, - .end_logical_lane = 1, + .start_logical_lane = 16, + .end_logical_lane = 19, + .device_number = 2, + .function_number = 4, + .link_speed_capability = GEN3, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_hotplug = 0, + .clk_req = CLK_REQ4, + }, + { /* WLAN */ + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 15, + .end_logical_lane = 15, .device_number = 2, .function_number = 2, .link_speed_capability = GEN3, .turn_off_unused_lanes = true, - .link_aspm = 2, - .link_hotplug = 3, - .clk_req = CLK_REQ1, + .link_aspm = ASPM_L1, + .link_hotplug = 0, + .clk_req = CLK_REQ6, }, - { + { /* SD */ .engine_type = PCIE_ENGINE, .port_present = true, - .start_logical_lane = 2, - .end_logical_lane = 3, + .start_logical_lane = 14, + .end_logical_lane = 14, .device_number = 2, .function_number = 3, .link_speed_capability = GEN3, .turn_off_unused_lanes = true, - .link_aspm = 2, - .link_hotplug = 3, - .gpio_group_id = GPIO_27, - .clk_req = CLK_REQ0, + .link_aspm = ASPM_L1, + .link_hotplug = 1, + .clk_req = CLK_REQ5, + }, + { /* NVMe SSD1 */ + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 8, + .end_logical_lane = 9, + .device_number = 1, + .function_number = 2, + .link_speed_capability = GEN3, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_hotplug = 0, + .clk_req = CLK_REQ1, + }, + { /* GBE */ + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 13, + .end_logical_lane = 13, + .device_number = 2, + .function_number = 1, + .link_speed_capability = GEN3, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_hotplug = 0, + .clk_req = CLK_REQ3, + }, + { /* WWAN */ + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 12, + .end_logical_lane = 12, + .device_number = 1, + .function_number = 3, + .link_speed_capability = GEN3, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_hotplug = 0, + .clk_req = CLK_REQ2, }, }; @@ -63,17 +112,17 @@ .hdp_index = DDI_HDP2 }, { /* DDI2 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX3, .hdp_index = DDI_HDP3, }, { /* DDI3 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX4, .hdp_index = DDI_HDP4, }, - { /* DDI4 - unused */ - .connector_type = DDI_UNUSED_TYPE, + { /* DDI4 - DP (type C) */ + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX5, .hdp_index = DDI_HDP5, } @@ -98,18 +147,18 @@ connector_type = eeprom_connector_type_data[1] | eeprom_connector_type_data[0] << 8; switch (connector_type) { - case 0xc: + case 0x0c: printk(BIOS_DEBUG, "Configuring DDI1 as HDMI.\n"); return DDI_HDMI; - break; case 0x13: printk(BIOS_DEBUG, "Configuring DDI1 as DP.\n"); return DDI_DP; - break; case 0x14: printk(BIOS_DEBUG, "Configuring DDI1 as eDP.\n"); return DDI_EDP; - break; + case 0x17: + printk(BIOS_DEBUG, "Configuring DDI1 as USB-C.\n"); + return DDI_DP_W_TYPEC; default: printk(BIOS_WARNING, "Unexpected display connector type %x. Disabling DDI1.\n", connector_type); -- To view, visit https://review.coreboot.org/c/coreboot/+/70214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1aca5423879433c1d0d2405d96cf7d806c57b20 Gerrit-Change-Number: 70214 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/meteorlake: Add timestamp for cse_fw_sync
by Sridhar Siricilla (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Tarun Tuli, Dinesh Gehlot, Paul Menzel, Kapil Porwal. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70172 ) Change subject: soc/intel/meteorlake: Add timestamp for cse_fw_sync ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cfbf84018e312fbf9482f0fba05b444603cd4b9 Gerrit-Change-Number: 70172 Gerrit-PatchSet: 10 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 17:17:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [do not merge] mb/prodrive/atlas: for testing
by build bot (Jenkins) (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Christian Walter, Angel Pons, Lean Sheng Tan. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67415 ) Change subject: [do not merge] mb/prodrive/atlas: for testing ...................................................................... Patch Set 13: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/67415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c686aacea130c99e8ab2fe984b150a7ad6f82d Gerrit-Change-Number: 67415 Gerrit-PatchSet: 13 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 17:03:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2022