coreboot-gerrit December 2022

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[S] Change in coreboot[master]: mb/google/brya/var/gaelin: Add camera module settings
by Felix Held (Code Review) 01 Dec '22

01 Dec '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69963 ) Change subject: mb/google/brya/var/gaelin: Add camera module settings ...................................................................... mb/google/brya/var/gaelin: Add camera module settings Modify USB2.0 port[4] settings to support camera. BUG=b:238252678 BRANCH=firmware-brya-14505.B TEST=with brask overlay changes, camera in camera app works Change-Id: I42325b75e129429ee451ded6a2086fd3808e581a Signed-off-by: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69963 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/brya/variants/gaelin/gpio.c M src/mainboard/google/brya/variants/gaelin/overridetree.cb 2 files changed, 31 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Raymond Chung: Looks good to me, but someone else must approve Derek Huang: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brya/variants/gaelin/gpio.c b/src/mainboard/google/brya/variants/gaelin/gpio.c index a20e385..1438975 100644 --- a/src/mainboard/google/brya/variants/gaelin/gpio.c +++ b/src/mainboard/google/brya/variants/gaelin/gpio.c @@ -10,7 +10,7 @@ /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), /* A17 : DISP_MISCC ==> EN_FCAM_PWR */ - PAD_CFG_GPO(GPP_A17, 0, DEEP), + PAD_CFG_GPO(GPP_A17, 1, DEEP), /* A19 : DDSP_HPD1 ==> NC */ PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> NC */ @@ -62,7 +62,7 @@ /* E5 : SATA_DEVSLP1 ==> USB_A1_RT_RST_ODL */ PAD_CFG_GPO(GPP_E5, 1, DEEP), /* E7 : PROC_GP1 ==> EN_MIC_PWR */ - PAD_CFG_GPO(GPP_E7, 0, DEEP), + PAD_CFG_GPO(GPP_E7, 1, DEEP), /* E14 : DDSP_HPDA ==> EDP_HPD */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* E15 : RSVD_TP ==> PCH_WP_OD */ diff --git a/src/mainboard/google/brya/variants/gaelin/overridetree.cb b/src/mainboard/google/brya/variants/gaelin/overridetree.cb index dcb695f..57079f3 100644 --- a/src/mainboard/google/brya/variants/gaelin/overridetree.cb +++ b/src/mainboard/google/brya/variants/gaelin/overridetree.cb @@ -2,6 +2,7 @@ register "usb2_ports[2]" = "USB2_PORT_EMPTY" register "usb2_ports[3]" = "USB2_PORT_EMPTY" + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # UFCamera register "usb3_ports[2]" = "USB3_PORT_EMPTY" register "usb3_ports[3]" = "USB3_PORT_EMPTY" @@ -101,6 +102,14 @@ device ref usb2_port2 on end end chip drivers/usb/acpi + register "desc" = ""UFCamera"" + register "type" = "UPC_TYPE_INTERNAL" + register "has_power_resource" = "1" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A17)" + register "enable_delay_ms" = "20" + device ref usb2_port5 on end + end + chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A3 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" -- To view, visit https://review.coreboot.org/c/coreboot/+/69963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42325b75e129429ee451ded6a2086fd3808e581a Gerrit-Change-Number: 69963 Gerrit-PatchSet: 3 Gerrit-Owner: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bruce Chiang <brucechiang(a)msi.corp-partner.google.com> Gerrit-CC: Eason Chang <easonchang(a)msi.corp-partner.google.com> Gerrit-CC: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/rex: Add probed fw_configs to SMBIOS OEM strings
by Subrata Banik (Code Review) 01 Dec '22

01 Dec '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70228 ) Change subject: mb/google/rex: Add probed fw_configs to SMBIOS OEM strings ...................................................................... mb/google/rex: Add probed fw_configs to SMBIOS OEM strings Enable this feature, and it can use the probe statement in devicetree to cache of fw_config field as oem string. TEST=With CBI FW_CONFIG field set to 0x1561 localhost ~ # dmidecode -t 11 Getting SMBIOS data from sysfs. SMBIOS 3.0 present. Handle 0x0009, DMI type 11, 5 bytes OEM Strings String 1: AUDIO-MAX98357_ALC5682I_I2S String 2: CELLULAR-CELLULAR_PCIE String 3: UFC-UFC_MIPI String 4: WFC-WFC_MIPI String 5: DB_SD-SD_GL9755S Change-Id: I6cb35eb9c0fbe32764ca76bb7a929cc92fc38404 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/rex/mainboard.c 1 file changed, 40 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/70228/1 diff --git a/src/mainboard/google/rex/mainboard.c b/src/mainboard/google/rex/mainboard.c index 008b3ef..f61af2c 100644 --- a/src/mainboard/google/rex/mainboard.c +++ b/src/mainboard/google/rex/mainboard.c @@ -6,6 +6,7 @@ #include <baseboard/variants.h> #include <device/device.h> #include <ec/ec.h> +#include <fw_config.h> #include <vendorcode/google/chromeos/chromeos.h> static void mainboard_init(void *chip_info) @@ -55,9 +56,20 @@ acpigen_write_scope_end(); /* Scope */ } +static void add_fw_config_oem_string(const struct fw_config *config, void *arg) +{ + struct smbios_type11 *t; + char buffer[64]; + + t = (struct smbios_type11 *)arg; + + snprintf(buffer, sizeof(buffer), "%s-%s", config->field_name, config->option_name); + t->count = smbios_add_string(t->eos, buffer); +} + static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t) { - /* TODO: Add mainboard-smbios entries */ + fw_config_for_each_found(add_fw_config_oem_string, t); } static void mainboard_dev_init(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/70228 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cb35eb9c0fbe32764ca76bb7a929cc92fc38404 Gerrit-Change-Number: 70228 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in libgfxinit[master]: [RFC] Pcode mailbox unavailable before FSP silicon
by Martin L Roth (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Anil Kumar K, Nico Huber, Jeremy Compostella, Jérémy Compostella, Angel Pons. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/69341 ) Change subject: [RFC] Pcode mailbox unavailable before FSP silicon ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/libgfxinit/+/69341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I0514e404a7b580d1e35af7b39c1bd77183f11058 Gerrit-Change-Number: 69341 Gerrit-PatchSet: 3 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 19:59:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in libgfxinit[master]: common/tigerlake: Add support for Alder Lake-P
by Martin L Roth (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Tarun Tuli, Nico Huber, Sean Rhodes, Jon Murphy, Tim Wawrzynczak, Angel Pons. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/67802 ) Change subject: common/tigerlake: Add support for Alder Lake-P ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/libgfxinit/+/67802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I7f5dd19f95755e8f4634045260c6a76f9906be57 Gerrit-Change-Number: 67802 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 19:59:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in libgfxinit[master]: common/tigerlake: Support ADL-P CDClk clock crawl
by Martin L Roth (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Nico Huber, Angel Pons. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/67801 ) Change subject: common/tigerlake: Support ADL-P CDClk clock crawl ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/libgfxinit/+/67801 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Id01752a41e4e401a5f759453c12f368395eebdf2 Gerrit-Change-Number: 67801 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 19:59:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in libgfxinit[master]: common: Begin Alder Lake integration
by Martin L Roth (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Angel Pons. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/67800 ) Change subject: common: Begin Alder Lake integration ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/libgfxinit/+/67800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I3258a125d4b76929673eea5406d26575f9fbd535 Gerrit-Change-Number: 67800 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 19:59:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Docs: Add page for external resources
by Martin L Roth (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Felix Singer, Maximilian Brune. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70239 ) Change subject: Docs: Add page for external resources ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Kind of a proof-of-concept right now. I expect that we'll add a fair number of links to this eventually. Maybe at some point we'll need an 'external_resources' folder with sub-pages. If there are any links that you want added, you can either edit this patch directly or make a comment, and I'll add them. -- To view, visit https://review.coreboot.org/c/coreboot/+/70239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf411e67bf865426b1a3b99ecbabed2302a7b738 Gerrit-Change-Number: 70239 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 19:56:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Docs: Add page for external resources
by Martin L Roth (Code Review) 01 Dec '22

01 Dec '22

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70239 ) Change subject: Docs: Add page for external resources ...................................................................... Docs: Add page for external resources This is a page to add links to other sites that have firmware related material, or other things that are of interest to the community. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: Icf411e67bf865426b1a3b99ecbabed2302a7b738 --- A Documentation/external_docs.md M Documentation/index.md 2 files changed, 88 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/70239/1 diff --git a/Documentation/external_docs.md b/Documentation/external_docs.md new file mode 100644 index 0000000..40ae386 --- /dev/null +++ b/Documentation/external_docs.md @@ -0,0 +1,74 @@ +# External Resources + +## Articles + +* External Interrupts in the x86 system. + [Part1](https://habr.com/en/post/446312/) + [Part2](https://habr.com/en/post/501660/) + [Part3](https://habr.com/en/post/501912/) + + +## General Information + +* [OS Dev](https://wiki.osdev.org/Categorized_Main_Page) +* [Interface BUS](http://www.interfacebus.com/) + + +## Firmware Specifications + +* [System Management BIOS - SMBIOS](https://www.dmtf.org/standards/smbios) +* [Desktop and Mobile Architecture for System Hardware - DASH](https://www.dmtf.org/standards/dash) +* [PNP BIOS](https://www.intel.com/content/dam/support/us/en/documents/motherboard… +* [ACPI](https://uefi.org/acpi/specs) + + +## Hardware information + +* [WikiChip](https://en.wikichip.org/wiki/WikiChip) +* [Sandpile](https://www.sandpile.org/) + + +### Hardware Specifications & Standards + +* [Bluetooth](https://www.bluetooth.com/specifications/specs/) - Bluetooth SIG +* [eMMC](https://www.jedec.org/) - JEDEC - (LOGIN REQUIRED) +* [eSPI](https://www.intel.com/content/www/us/en/download/645987/27055/espi.ht… - Intel +* [I2c Spec](https://web.archive.org/web/20170704151406/https://www.nxp.com/docs/e…, + [Appnote](https://www.nxp.com/docs/en/application-note/AN10216.pdf) - NXP +* [I2S](https://www.nxp.com/docs/en/user-manual/UM11732.pdf) - NXP +* [I3C](https://www.mipi.org/specifications/i3c-sensor-specification) - MIPI Alliance (LOGIN REQUIRED) +* [Memory](https://www.jedec.org/) - JEDEC - (LOGIN REQUIRED) +* [LPC](https://www.intel.com/content/dam/www/program/design/us/en/documents/l… - Intel +* [PCI / PCIe / M.2](https://pcisig.com/specifications) - PCI-SIG - (LOGIN REQUIRED) +* [Power Delivery](https://www.usb.org/documents) - USB Implementers Forum +* [SATA](https://sata-io.org/developers/purchase-specification) - SATA-IO (LOGIN REQUIRED) +* [SMBus](http://www.smbus.org/specs/) - System Management Interface Forum +* [Smart Battery](http://smartbattery.org/specs/) - Smart Battery System Implementers Forum +* [USB](https://www.usb.org/documents) - USB Implementers Forum +* [WI-FI](https://www.wi-fi.org/discover-wi-fi/specifications) - Wi-Fi Alliance + + +### Chip Vendor Documentation + +* AMD + * [Developer Guides, Manuals & ISA Documents](https://developer.amd.com/resources/developer-guides-manuals/) + * [AMD Tech Docs - Official Documentation Page](https://www.amd.com/en/support/tech-docs) +* ARM + * [Tools and Software - Specifications](https://developer.arm.com/tools-and-software/software-devel… +* Intel + * [Developer Zone](https://www.intel.com/content/www/us/en/developer/overview.html) + * [Resource & Documentation Center](https://www.intel.com/content/www/us/en/resources-documentation/dev… +* Rockchip + * [Open Source Wiki](https://opensource.rock-chips.com/wiki_Main_Page) + + +## Software + + * [Fiedka](https://github.com/fiedka/fiedka) - A graphical Firmware Editor + * [IOTools](https://github.com/adurbin/iotools) - Command line tools to access hardware registers + + +## Infrastructure software + +* [Kconfig](https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.htm… +* [GNU Make](https://www.gnu.org/software/make/manual/) diff --git a/Documentation/index.md b/Documentation/index.md index 0cb462c..45ad837 100644 --- a/Documentation/index.md +++ b/Documentation/index.md @@ -197,4 +197,5 @@ * [Boards supported in each release directory](releases/boards_supported_on_branches.md) * [Release notes](releases/index.md) * [Acronyms & Definitions](acronyms.md) +* [External Resources](external_docs.md) * [Documentation License](documentation_license.md) -- To view, visit https://review.coreboot.org/c/coreboot/+/70239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf411e67bf865426b1a3b99ecbabed2302a7b738 Gerrit-Change-Number: 70239 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/rex: Implement S0ix hooks aka `MS0X` method
by Subrata Banik (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Utkarsh H Patel, Kapil Porwal, Ivy Jian, Sridhar Siricilla, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70196 ) Change subject: mb/google/rex: Implement S0ix hooks aka `MS0X` method ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/70196/comment/1a1fc1f9_06c36570 PS5, Line 10: on the state of the system while `SKL_S0_L` signal is `low` (while > SLP_S0_L Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/70196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6b5e066f228ea5dc79ae14dd803fc283fd248ce Gerrit-Change-Number: 70196 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-CC: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Comment-Date: Thu, 01 Dec 2022 19:36:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/rex: Implement S0ix hooks aka `MS0X` method
by Subrata Banik (Code Review) 01 Dec '22

01 Dec '22

Attention is currently required from: Subrata Banik, Kapil Porwal, Ivy Jian, Sridhar Siricilla, Eric Lai, Utkarsh H Patel. Hello build bot (Jenkins), Tarun Tuli, Kapil Porwal, Ivy Jian, Utkarsh H Patel, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70196 to look at the new patch set (#6). Change subject: mb/google/rex: Implement S0ix hooks aka `MS0X` method ...................................................................... mb/google/rex: Implement S0ix hooks aka `MS0X` method This patch ensures to be able to drive SYS_SLP_S0IX_L `low` based on the state of the system while `SLP_S0_L` signal is `low` (while the system is in S0ix). Implemented runtime ASL method (MS0X) being called by PEPD device _DSM to configure `SLP_S0_GATE (GPP_H14)` PIN at S0ix entry/exit. Scope (\_SB) { Method (MS0X, 1, Serialized) { If ((Arg0 == One)) { \_SB.PCI0.CTXS (0x75) } Else { \_SB.PCI0.STXS (0x75) } } BUG=b:256807255 TEST=Able to see SYS_SLP_S0IX_L goes low in S0ix. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ie6b5e066f228ea5dc79ae14dd803fc283fd248ce --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/mainboard.c M src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h 4 files changed, 84 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/70196/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/70196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6b5e066f228ea5dc79ae14dd803fc283fd248ce Gerrit-Change-Number: 70196 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-CC: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2022